Commit ae1da439 authored by Matthias Braun's avatar Matthias Braun
Browse files

more be_foreach_definition usage

parent b731214f
......@@ -140,36 +140,18 @@ void create_borders(ir_node *block, void *env_ptr)
* relevant for the interval borders.
*/
sched_foreach_reverse(block, irn) {
DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
if (get_irn_mode(irn) == mode_T) {
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
*/
if (arch_irn_consider_in_reg_alloc(env->cls, proj)) {
int nr = get_irn_idx(proj);
bitset_clear(live, nr);
border_def(proj, step, 1);
}
}
} else {
DB((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
DB((dbg, LEVEL_2, "\tlive: %B\n", live));
be_foreach_definition(irn, env->cls, def,
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
*/
if (arch_irn_consider_in_reg_alloc(env->cls, irn)) {
int nr = get_irn_idx(irn);
bitset_clear(live, nr);
border_def(irn, step, 1);
}
}
unsigned idx = get_irn_idx(def);
bitset_clear(live, idx);
border_def(def, step, 1);
);
/*
* If the node is no phi node we can examine the uses.
......
......@@ -45,38 +45,11 @@ be_insn_t *be_scan_insn(be_chordal_env_t *const env, ir_node *const irn)
bool has_constraints = false;
const arch_register_class_t *cls = env->cls;
insn->irn = irn;
if (get_irn_mode(irn) == mode_T) {
ir_node *p;
/* This instruction might create more than one def. These are handled
by Proj's, find them. */
foreach_out_edge(irn, edge) {
p = get_edge_src_irn(edge);
/* did not work if the result is a ProjT. This should NOT happen
in the backend, but check it for now. */
assert(get_irn_mode(p) != mode_T);
if (arch_irn_consider_in_reg_alloc(env->cls, p)) {
/* found a def: create a new operand */
arch_register_req_t const *const req = arch_get_irn_register_req(p);
if (arch_register_req_is(req, limited)) {
o.regs = req->limited;
has_constraints = true;
} else {
o.regs = env->allocatable_regs->data;
has_constraints |= req->width > 1;
}
o.carrier = p;
o.partner = NULL;
obstack_grow(obst, &o, sizeof(o));
insn->n_ops++;
}
}
} else if (arch_irn_consider_in_reg_alloc(env->cls, irn)) {
/* only one def, create one operand */
arch_register_req_t const *const req = arch_get_irn_register_req(irn);
be_foreach_definition(irn, cls, p,
/* found a def: create a new operand */
arch_register_req_t const *const req = arch_get_irn_register_req(p);
if (arch_register_req_is(req, limited)) {
o.regs = req->limited;
has_constraints = true;
......@@ -84,11 +57,11 @@ be_insn_t *be_scan_insn(be_chordal_env_t *const env, ir_node *const irn)
o.regs = env->allocatable_regs->data;
has_constraints |= req->width > 1;
}
o.carrier = irn;
o.carrier = p;
o.partner = NULL;
obstack_grow(obst, &o, sizeof(o));
insn->n_ops++;
}
);
insn->use_start = insn->n_ops;
......
......@@ -567,19 +567,10 @@ static fp_liveness fp_liveness_transfer(ir_node *irn, fp_liveness live)
int i, n;
const arch_register_class_t *cls = &ia32_reg_classes[CLASS_ia32_fp];
if (get_irn_mode(irn) == mode_T) {
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
if (arch_irn_consider_in_reg_alloc(cls, proj)) {
const arch_register_t *reg = x87_get_irn_register(proj);
live &= ~(1 << reg->index);
}
}
} else if (arch_irn_consider_in_reg_alloc(cls, irn)) {
const arch_register_t *reg = x87_get_irn_register(irn);
be_foreach_definition(irn, cls, def,
const arch_register_t *reg = x87_get_irn_register(def);
live &= ~(1 << reg->index);
}
);
for (i = 0, n = get_irn_arity(irn); i < n; ++i) {
ir_node *op = get_irn_n(irn, i);
......
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