Commit b1d47c45 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

amd64, arm, ia32, sparc, template: Small cleanup in node specifications.

parent c5940669
# the cpu architecture (ia32, ia64, mips, sparc, ppc, ...) # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
$arch = "TEMPLATE"; $arch = "TEMPLATE";
#
# Modes # Modes
# $mode_gp = "mode_Iu"; # mode used by general purpose registers
$mode_gp = "mode_Iu"; # mode used by general purpose registers $mode_fp = "mode_F"; # mode used by floatingpoint registers
$mode_fp = "mode_F"; # mode used by floatingpoint registers
# The node description is done as a perl hash initializer with the # The node description is done as a perl hash initializer with the
# following structure: # following structure:
...@@ -13,12 +11,12 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers ...@@ -13,12 +11,12 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers
# %nodes = ( # %nodes = (
# #
# <op-name> => { # <op-name> => {
# state => "floats|pinned|mem_pinned|exc_pinned", # optional # state => "floats|pinned|mem_pinned|exc_pinned", # optional, default floats
# comment => "any comment for constructor", # optional # comment => "any comment for constructor", # optional
# in_reqs => [ "reg_class|register" ] | "...", # in_reqs => [ "reg_class|register" ] | "...",
# out_reqs => [ "reg_class|register|in_rX" ] | "...", # out_reqs => [ "reg_class|register|in_rX" ] | "...",
# outs => { "out1", "out2" },# optional, creates pn_op_out1, ... consts
# ins => { "in1", "in2" }, # optional, creates n_op_in1, ... consts # ins => { "in1", "in2" }, # optional, creates n_op_in1, ... consts
# outs => { "out1", "out2" },# optional, creates pn_op_out1, ... consts
# mode => "mode_Iu", # optional, predefines the mode # mode => "mode_Iu", # optional, predefines the mode
# emit => "emit code with templates", # optional for virtual nodes # emit => "emit code with templates", # optional for virtual nodes
# attr => "additional attribute arguments for constructor", # optional # attr => "additional attribute arguments for constructor", # optional
...@@ -29,28 +27,20 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers ...@@ -29,28 +27,20 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers
# #
# ... # (all nodes you need to describe) # ... # (all nodes you need to describe)
# #
# ); # close the %nodes initializer # );
# state: state of the operation, OPTIONAL (default is "floats")
#
# arity: arity of the operation, MUST NOT BE OMITTED
#
# outs: if a node defines more than one output, the names of the projections
# nodes having outs having automatically the mode mode_T
#
# comment: OPTIONAL comment for the node constructor
%reg_classes = ( %reg_classes = (
gp => [ gp => [
{ name => "r0" }, { name => "r0" },
{ name => "r1" }, { name => "r1" },
{ name => "r2" }, { name => "r2" },
{ name => "r3" }, { name => "r3" },
{ name => "r4" }, { name => "r4" },
{ name => "r5" }, { name => "r5" },
{ name => "r6" }, { name => "r6" },
{ name => "r7" }, { name => "r7" },
{ name => "r8" }, { name => "r8" },
{ name => "r9" }, { name => "r9" },
{ name => "r10" }, { name => "r10" },
{ name => "r11" }, { name => "r11" },
{ name => "r12" }, { name => "r12" },
...@@ -60,16 +50,16 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers ...@@ -60,16 +50,16 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers
{ mode => $mode_gp } { mode => $mode_gp }
], ],
fp => [ fp => [
{ name => "f0" }, { name => "f0" },
{ name => "f1" }, { name => "f1" },
{ name => "f2" }, { name => "f2" },
{ name => "f3" }, { name => "f3" },
{ name => "f4" }, { name => "f4" },
{ name => "f5" }, { name => "f5" },
{ name => "f6" }, { name => "f6" },
{ name => "f7" }, { name => "f7" },
{ name => "f8" }, { name => "f8" },
{ name => "f9" }, { name => "f9" },
{ name => "f10" }, { name => "f10" },
{ name => "f11" }, { name => "f11" },
{ name => "f12" }, { name => "f12" },
......
...@@ -537,7 +537,7 @@ xorpd_0 => { ...@@ -537,7 +537,7 @@ xorpd_0 => {
mode => $mode_xmm, mode => $mode_xmm,
}, },
xorp => { xorp => {
template => $binopx_commutative, template => $binopx_commutative,
emit => "xorp%MX %AM", emit => "xorp%MX %AM",
}, },
...@@ -546,7 +546,7 @@ movd_xmm_gp => { ...@@ -546,7 +546,7 @@ movd_xmm_gp => {
state => "exc_pinned", state => "exc_pinned",
ins => [ "operand" ], ins => [ "operand" ],
outs => [ "res" ], outs => [ "res" ],
in_reqs => [ "xmm" ], in_reqs => [ "xmm" ],
out_reqs => [ "gp" ], out_reqs => [ "gp" ],
mode => $mode_gp, mode => $mode_gp,
attr_type => "amd64_addr_attr_t", attr_type => "amd64_addr_attr_t",
......
...@@ -3,14 +3,10 @@ ...@@ -3,14 +3,10 @@
$arch = "arm"; $arch = "arm";
#
# Modes
#
$mode_gp = "arm_mode_gp"; $mode_gp = "arm_mode_gp";
$mode_flags = "arm_mode_flags"; $mode_flags = "arm_mode_flags";
$mode_fp = "mode_F"; $mode_fp = "mode_F";
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = ( %reg_classes = (
gp => [ gp => [
{ name => "r0", dwarf => 0 }, { name => "r0", dwarf => 0 },
...@@ -52,22 +48,26 @@ $default_attr_type = "arm_attr_t"; ...@@ -52,22 +48,26 @@ $default_attr_type = "arm_attr_t";
$default_copy_attr = "arm_copy_attr"; $default_copy_attr = "arm_copy_attr";
%init_attr = ( %init_attr = (
arm_attr_t => "\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);", arm_attr_t =>
arm_Address_attr_t => "init_arm_attributes(res, irn_flags, in_reqs, n_res);",
"\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);\n". arm_Address_attr_t =>
"init_arm_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_arm_Address_attributes(res, entity, offset);", "\tinit_arm_Address_attributes(res, entity, offset);",
arm_CondJmp_attr_t => "\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);", arm_CondJmp_attr_t =>
arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);", "init_arm_attributes(res, irn_flags, in_reqs, n_res);",
arm_fConst_attr_t => "\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);", arm_SwitchJmp_attr_t =>
"init_arm_attributes(res, irn_flags, in_reqs, n_res);",
arm_fConst_attr_t =>
"init_arm_attributes(res, irn_flags, in_reqs, n_res);",
arm_load_store_attr_t => arm_load_store_attr_t =>
"\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);\n". "init_arm_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);", "\tinit_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);",
arm_shifter_operand_t => arm_shifter_operand_t =>
"\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);\n", "init_arm_attributes(res, irn_flags, in_reqs, n_res);",
arm_cmp_attr_t => arm_cmp_attr_t =>
"\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);\n", "init_arm_attributes(res, irn_flags, in_reqs, n_res);",
arm_farith_attr_t => arm_farith_attr_t =>
"\tinit_arm_attributes(res, irn_flags, in_reqs, n_res);\n". "init_arm_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_arm_farith_attributes(res, op_mode);", "\tinit_arm_farith_attributes(res, op_mode);",
); );
...@@ -280,11 +280,11 @@ Mul => { ...@@ -280,11 +280,11 @@ Mul => {
emit => 'mul %D0, %S0, %S1', emit => 'mul %D0, %S0, %S1',
mode => $mode_gp, mode => $mode_gp,
constructors => { constructors => {
"" => { out_reqs => [ "gp" ] }, "" => { out_reqs => [ "gp" ] },
# TODO: !in_r1 for out constrains the register allocator more than # TODO: !in_r1 for out constraints the register allocator more than
# necessary, as usually you can fix the problem by swapping the inputs. But # necessary, as usually you can fix the problem by swapping the inputs. But
# for this scheme we would need a special if both inputs are the same value. # for this scheme we would need a special if both inputs are the same value.
"v5" => { out_reqs => [ "!in_r1" ] }, v5 => { out_reqs => [ "!in_r1" ] },
}, },
}, },
...@@ -305,9 +305,9 @@ Mla => { ...@@ -305,9 +305,9 @@ Mla => {
emit => 'mla %D0, %S0, %S1, %S2', emit => 'mla %D0, %S0, %S1, %S2',
mode => $mode_gp, mode => $mode_gp,
constructors => { constructors => {
"" => { out_reqs => [ "gp" ] }, "" => { out_reqs => [ "gp" ] },
# See comments for Mul_v5 out register constraint # See comments for Mul_v5 out register constraint
"v5" => { out_reqs => [ "!in_r1" ] }, v5 => { out_reqs => [ "!in_r1" ] },
} }
}, },
...@@ -382,14 +382,14 @@ RsbS => { ...@@ -382,14 +382,14 @@ RsbS => {
}, },
Mov => { Mov => {
template => $unop_shifter_operand, template => $unop_shifter_operand,
emit => 'mov %D0, %O', emit => 'mov %D0, %O',
ins => [ "Rm", "Rs" ], ins => [ "Rm", "Rs" ],
}, },
Mvn => { Mvn => {
template => $unop_shifter_operand, template => $unop_shifter_operand,
emit => 'mvn %D0, %O', emit => 'mvn %D0, %O',
}, },
Pkhbt => { Pkhbt => {
...@@ -427,14 +427,14 @@ LinkMovPC => { ...@@ -427,14 +427,14 @@ LinkMovPC => {
# mov lr, pc\n ldr pc, XXX -- This combination is used for calls to function # mov lr, pc\n ldr pc, XXX -- This combination is used for calls to function
# pointers # pointers
LinkLdrPC => { LinkLdrPC => {
state => "exc_pinned", state => "exc_pinned",
irn_flags => [ "modify_flags" ], irn_flags => [ "modify_flags" ],
in_reqs => "...", in_reqs => "...",
out_reqs => "...", out_reqs => "...",
attr_type => "arm_load_store_attr_t", attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity", attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
emit => "mov lr, pc\n". emit => "mov lr, pc\n".
"ldr pc, %O", "ldr pc, %O",
}, },
Bl => { Bl => {
...@@ -621,9 +621,7 @@ Stf => { ...@@ -621,9 +621,7 @@ Stf => {
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity", attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
}, },
#
# floating point constants # floating point constants
#
fConst => { fConst => {
op_flags => [ "constlike" ], op_flags => [ "constlike" ],
irn_flags => [ "rematerializable" ], irn_flags => [ "rematerializable" ],
...@@ -698,4 +696,4 @@ OrPl_t => { ...@@ -698,4 +696,4 @@ OrPl_t => {
dump_func => "NULL", dump_func => "NULL",
}, },
); # end of %nodes );
...@@ -13,11 +13,11 @@ ...@@ -13,11 +13,11 @@
$arch = "ia32"; $arch = "ia32";
$mode_xmm = "ia32_mode_float64"; $mode_xmm = "ia32_mode_float64";
$mode_fp87 = "ia32_mode_E"; $mode_fp87 = "ia32_mode_E";
$mode_gp = "ia32_mode_gp"; $mode_gp = "ia32_mode_gp";
$mode_flags = "ia32_mode_flags"; $mode_flags = "ia32_mode_flags";
$mode_fpcw = "ia32_mode_fpcw"; $mode_fpcw = "ia32_mode_fpcw";
%reg_classes = ( %reg_classes = (
gp => [ gp => [
...@@ -64,33 +64,28 @@ $mode_fpcw = "ia32_mode_fpcw"; ...@@ -64,33 +64,28 @@ $mode_fpcw = "ia32_mode_fpcw";
{ name => "eflags", dwarf => 9 }, { name => "eflags", dwarf => 9 },
{ mode => "ia32_mode_flags", flags => "manual_ra" } { mode => "ia32_mode_flags", flags => "manual_ra" }
], ],
); # %reg_classes );
$default_attr_type = "ia32_attr_t"; $default_attr_type = "ia32_attr_t";
$default_copy_attr = "ia32_copy_attr"; $default_copy_attr = "ia32_copy_attr";
sub ia32_custom_init_attr { sub ia32_custom_init_attr {
my $constr = shift; my ($constr, $node, $name) = @_;
my $node = shift;
my $name = shift; my $res = "";
my $res = ""; my $am = $node->{am};
if (defined($am)) {
if(defined($node->{am})) { if ($am eq "source,unary") {
my $am = $node->{am};
if($am eq "source,unary") {
$res .= "\tset_ia32_am_support(res, ia32_am_unary);"; $res .= "\tset_ia32_am_support(res, ia32_am_unary);";
} elsif($am eq "source,binary") { } elsif ($am eq "source,binary") {
$res .= "\tset_ia32_am_support(res, ia32_am_binary);"; $res .= "\tset_ia32_am_support(res, ia32_am_binary);";
} elsif($am eq "none") { } elsif ($am eq "none") {
# nothing to do # nothing to do
} else { } else {
die("Invalid address mode '$am' specified on op $name"); die("Invalid address mode '$am' specified on op $name");
} }
if($am ne "none") { if ($am ne "none" && $node->{state} ne "exc_pinned" && $node->{state} ne "pinned") {
if($node->{state} ne "exc_pinned" die("AM nodes must have pinned or AM pinned state ($name)");
and $node->{state} ne "pinned") {
die("AM nodes must have pinned or AM pinned state ($name)");
}
} }
} }
return $res; return $res;
...@@ -98,31 +93,31 @@ sub ia32_custom_init_attr { ...@@ -98,31 +93,31 @@ sub ia32_custom_init_attr {
$custom_init_attr_func = \&ia32_custom_init_attr; $custom_init_attr_func = \&ia32_custom_init_attr;
%init_attr = ( %init_attr = (
ia32_attr_t => ia32_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);", "init_ia32_attributes(res, irn_flags, in_reqs, n_res);",
ia32_call_attr_t => ia32_call_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_call_attributes(res, pop, call_tp);", "\tinit_ia32_call_attributes(res, pop, call_tp);",
ia32_condcode_attr_t => ia32_condcode_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_condcode_attributes(res, condition_code);", "\tinit_ia32_condcode_attributes(res, condition_code);",
ia32_switch_attr_t => ia32_switch_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_switch_attributes(res, switch_table);", "\tinit_ia32_switch_attributes(res, switch_table);",
ia32_copyb_attr_t => ia32_copyb_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_copyb_attributes(res, size);", "\tinit_ia32_copyb_attributes(res, size);",
ia32_immediate_attr_t => ia32_immediate_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_immediate_attributes(res, imm);", "\tinit_ia32_immediate_attributes(res, imm);",
ia32_x87_attr_t => ia32_x87_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_x87_attributes(res);", "\tinit_ia32_x87_attributes(res);",
ia32_climbframe_attr_t => ia32_climbframe_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_climbframe_attributes(res, count);", "\tinit_ia32_climbframe_attributes(res, count);",
ia32_return_attr_t => ia32_return_attr_t =>
"\tinit_ia32_attributes(res, irn_flags, in_reqs, n_res);\n". "init_ia32_attributes(res, irn_flags, in_reqs, n_res);\n".
"\tinit_ia32_return_attributes(res, pop);", "\tinit_ia32_return_attributes(res, pop);",
); );
...@@ -156,15 +151,15 @@ my $binop_flags = { ...@@ -156,15 +151,15 @@ my $binop_flags = {
}; };
my $binop_mem = { my $binop_mem = {
irn_flags => [ "modify_flags", "rematerializable" ], irn_flags => [ "modify_flags", "rematerializable" ],
state => "exc_pinned", state => "exc_pinned",
constructors => { constructors => {
"" => { in_reqs => [ "gp", "gp", "mem", "gp" ] }, "" => { in_reqs => [ "gp", "gp", "mem", "gp" ] },
"8bit" => { in_reqs => [ "gp", "gp", "mem", "eax ebx ecx edx" ] }, "8bit" => { in_reqs => [ "gp", "gp", "mem", "eax ebx ecx edx" ] },
}, },
out_reqs => [ "none", "flags", "mem" ], out_reqs => [ "none", "flags", "mem" ],
ins => [ "base", "index", "mem", "val" ], ins => [ "base", "index", "mem", "val" ],
outs => [ "unused", "flags", "M" ], outs => [ "unused", "flags", "M" ],
}; };
my $shiftop = { my $shiftop = {
...@@ -189,11 +184,11 @@ my $shiftop_double = { ...@@ -189,11 +184,11 @@ my $shiftop_double = {
irn_flags => [ "modify_flags", "rematerializable" ], irn_flags => [ "modify_flags", "rematerializable" ],
in_reqs => [ "gp", "gp", "ecx" ], in_reqs => [ "gp", "gp", "ecx" ],
constructors => { constructors => {
"" => { out_reqs => [ "in_r1 !in_r2 !in_r3", "flags" ] }, "" => { out_reqs => [ "in_r1 !in_r2 !in_r3", "flags" ] },
# With an immediate shift amount we can swap between ShlD/ShrD and negate # With an immediate shift amount we can swap between ShlD/ShrD and negate
# the shift amount, if the output gets the same register as the second # the shift amount, if the output gets the same register as the second
# input. # input.
"imm" => { out_reqs => [ "in_r1 in_r2", "flags" ] }, imm => { out_reqs => [ "in_r1 in_r2", "flags" ] },
}, },
ins => [ "val_high", "val_low", "count" ], ins => [ "val_high", "val_low", "count" ],
outs => [ "res", "flags" ], outs => [ "res", "flags" ],
...@@ -451,9 +446,9 @@ IMul => { ...@@ -451,9 +446,9 @@ IMul => {
IMulImm => { IMulImm => {
template => $binop_commutative, template => $binop_commutative,
out_reqs => [ "gp", "flags", "mem" ], out_reqs => [ "gp", "flags", "mem" ],
emit => "imul%M %#S4, %#AS3, %#D0", emit => "imul%M %#S4, %#AS3, %#D0",
latency => 5, latency => 5,
}, },
IMul1OP => { IMul1OP => {
...@@ -849,16 +844,16 @@ Jmp => { ...@@ -849,16 +844,16 @@ Jmp => {
}, },
IJmp => { IJmp => {
state => "pinned", state => "pinned",
op_flags => [ "cfopcode", "unknown_jump" ], op_flags => [ "cfopcode", "unknown_jump" ],
in_reqs => [ "gp", "gp", "mem", "gp" ], in_reqs => [ "gp", "gp", "mem", "gp" ],
out_reqs => [ "exec", "none", "mem" ], out_reqs => [ "exec", "none", "mem" ],
ins => [ "base", "index", "mem", "target" ], ins => [ "base", "index", "mem", "target" ],
outs => [ "jmp", "none", "M" ], outs => [ "jmp", "none", "M" ],
am => "source,unary", am => "source,unary",
emit => "jmp %*AS3", emit => "jmp %*AS3",
latency => 1, latency => 1,
mode => "mode_X", mode => "mode_X",
}, },
Const => { Const => {
...@@ -870,9 +865,9 @@ Const => { ...@@ -870,9 +865,9 @@ Const => {
}, },
Unknown => { Unknown => {
template => $valueop, template => $valueop,
latency => 0, latency => 0,
emit => "", emit => "",
}, },
GetEIP => { GetEIP => {
...@@ -920,36 +915,36 @@ ChangeCW => { ...@@ -920,36 +915,36 @@ ChangeCW => {
}, },
FldCW => { FldCW => {
op_flags => [ "uses_memory" ], op_flags => [ "uses_memory" ],
state => "pinned", state => "pinned",
in_reqs => [ "gp", "gp", "mem" ], in_reqs => [ "gp", "gp", "mem" ],
out_reqs => [ "fpcw" ], out_reqs => [ "fpcw" ],
ins => [ "base", "index", "mem" ], ins => [ "base", "index", "mem" ],
latency => 5, latency => 5,
emit => "fldcw %AM", emit => "fldcw %AM",
mode => $mode_fpcw, mode => $mode_fpcw,
}, },
FnstCW => { FnstCW => {
op_flags => [ "uses_memory" ], op_flags => [ "uses_memory" ],
state => "pinned", state => "pinned",
in_reqs => [ "gp", "gp", "mem", "fp_cw" ], in_reqs => [ "gp", "gp", "mem", "fp_cw" ],
out_reqs => [ "mem" ], out_reqs => [ "mem" ],
ins => [ "base", "index", "mem", "fpcw" ], ins => [ "base", "index", "mem", "fpcw" ],
latency => 5, latency => 5,
emit => "fnstcw %AM", emit => "fnstcw %AM",
mode => "mode_M", mode => "mode_M",
}, },
FnstCWNOP => { FnstCWNOP => {
op_flags => [ "uses_memory" ], op_flags => [ "uses_memory" ],
state => "pinned", state => "pinned",