Commit b35afc79 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

bearch: remove arch_register_type_joker.

arch_register_type_virtual is sufficient.
parent 3148f625
......@@ -58,9 +58,8 @@ $mode_fp = "mode_F"; # mode used by floatingpoint registers
# register types:
# 0 - no special type
# 1 - ignore (do not assign this register)
# 2 - emitter can choose an arbitrary register of this class
# 4 - the register is a virtual one
# 8 - register represents a state
# 2 - the register is a virtual one
# 4 - register represents a state
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
......
......@@ -53,9 +53,8 @@ $arch = "amd64";
# register types:
$normal = 0; # no special type
$ignore = 1; # ignore (do not assign this register)
$arbitrary = 2; # emitter can choose an arbitrary register of this class
$virtual = 4; # the register is a virtual one
$state = 8; # register represents a state
$virtual = 2; # the register is a virtual one
$state = 4; # register represents a state
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
......
......@@ -224,7 +224,7 @@ bool arch_reg_is_allocatable(const arch_register_req_t *req,
assert(req->type != arch_register_req_type_none);
if (req->cls != reg->reg_class)
return false;
if (reg->type & arch_register_type_joker)
if (reg->type & arch_register_type_virtual)
return true;
if (req->type & arch_register_req_type_limited)
return rbitset_is_set(req->limited, reg->index);
......
......@@ -55,16 +55,13 @@ typedef enum arch_register_type_t {
arch_register_type_none = 0,
/** Do not consider this register when allocating. */
arch_register_type_ignore = 1U << 0,
/** The emitter can choose an arbitrary register. The register fulfills any
* register constraints as long as the register class matches */
arch_register_type_joker = 1U << 1,
/** This is just a virtual register. Virtual registers fulfill any register
* constraints as long as the register class matches. It is a allowed to
* have multiple definitions for the same virtual register at a point */
arch_register_type_virtual = 1U << 2,
arch_register_type_virtual = 1U << 1,
/** The register represents a state that should be handled by bestate
* code */
arch_register_type_state = 1U << 3,
arch_register_type_state = 1U << 2,
} arch_register_type_t;
ENUM_BITSET(arch_register_type_t)
......
......@@ -1363,9 +1363,8 @@ static void add_phi_permutations(ir_node *block, int p)
ir_node *op = pred_info->assignments[a];
const arch_register_t *op_reg = arch_get_irn_register(op);
/* virtual or joker registers are ok too */
if ((op_reg->type & arch_register_type_joker)
|| (op_reg->type & arch_register_type_virtual))
/* Virtual registers are ok, too. */
if (op_reg->type & arch_register_type_virtual)
continue;
permutation[regn] = a;
......
......@@ -84,9 +84,8 @@ static void prepare_constr_insn(be_pre_spill_env_t *env, ir_node *node)
if (reg == NULL)
continue;
/* precolored with an ignore register (which is not a joker like
unknown/noreg) */
if ((reg->type & arch_register_type_joker) ||
/* Precolored with an ignore register (which is not virtual). */
if (reg->type & arch_register_type_virtual ||
rbitset_is_set(birg->allocatable_regs, reg->global_index))
continue;
......
......@@ -245,7 +245,6 @@ static void set_regs_or_place_dupls_walker(ir_node *bl, void *data)
DBG((dbg, LEVEL_1, " for %+F(%s) -- %+F(%s)\n", phi, phi_reg->name, arg, arg_reg->name));
if (phi_reg == arg_reg
|| (arg_reg->type & arch_register_type_joker)
|| (arg_reg->type & arch_register_type_virtual)) {
/* Phi and arg have the same register, so pin and continue */
pin_irn(arg, phi_block);
......
......@@ -680,7 +680,7 @@ static void check_input_constraints(ir_node *node)
ir_node *pred = get_Phi_pred(node, i);
const arch_register_t *pred_reg = arch_get_irn_register(pred);
if (reg != pred_reg && !(pred_reg->type & arch_register_type_joker)) {
if (reg != pred_reg && !(pred_reg->type & arch_register_type_virtual)) {
const char *pred_name = pred_reg != NULL ? pred_reg->name : "(null)";
const char *reg_name = reg != NULL ? reg->name : "(null)";
ir_fprintf(stderr, "Verify warning: Input %d of %+F in block %+F(%s) uses register %s instead of %s\n",
......
......@@ -12,9 +12,8 @@ $mode_fpcw = "ia32_mode_fpcw";
# register types:
$normal = 0; # no special type
$ignore = 1; # ignore (do not assign this register)
$arbitrary = 2; # emitter can choose an arbitrary register of this class
$virtual = 4; # the register is a virtual one
$state = 8; # register represents a state
$virtual = 2; # the register is a virtual one
$state = 4; # register represents a state
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
......@@ -26,7 +25,7 @@ $state = 8; # register represents a state
{ name => "edi", dwarf => 7 },
{ name => "ebp", dwarf => 5 },
{ name => "esp", dwarf => 4, type => $ignore },
{ name => "gp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
{ name => "gp_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes
{ mode => $mode_gp }
],
mmx => [
......@@ -61,7 +60,7 @@ $state = 8; # register represents a state
{ name => "st5", realname => "st(5)", dwarf => 16 },
{ name => "st6", realname => "st(6)", dwarf => 17 },
{ name => "st7", realname => "st(7)", dwarf => 18 },
{ name => "fp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
{ name => "fp_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes
{ mode => $mode_fp87 }
],
fp_cw => [ # the floating point control word
......
......@@ -64,14 +64,10 @@ sub translate_reg_type {
}
if ($t & 2) {
push(@types, "arch_register_type_joker");
}
if ($t & 4) {
push(@types, "arch_register_type_virtual");
}
if ($t & 8) {
if ($t & 4) {
push(@types, "arch_register_type_state");
}
......
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