Commit bc000a2f authored by Matthias Braun's avatar Matthias Braun
Browse files

add index to register classes, change some fields to unsigned

[r16009]
parent e4749c54
......@@ -417,17 +417,17 @@ static void TEMPLATE_done(void *self) {
static int TEMPLATE_get_n_reg_class(const void *self)
static unsigned TEMPLATE_get_n_reg_class(const void *self)
{
(void) self;
return N_CLASSES;
}
static const arch_register_class_t *TEMPLATE_get_reg_class(const void *self,
int i)
unsigned i)
{
(void) self;
assert(i >= 0 && i < N_CLASSES && "Invalid TEMPLATE register class requested.");
assert(i < N_CLASSES);
return &TEMPLATE_reg_classes[i];
}
......
......@@ -819,19 +819,18 @@ static void arm_done(void *self) {
* here to speed up register allocation (and makes dumps
* smaller and more readable).
*/
static int arm_get_n_reg_class(const void *self) {
const arm_isa_t *isa = self;
/* ARGH! is called BEFORE transform */
static unsigned arm_get_n_reg_class(const void *self) {
(void) self;
return N_CLASSES;
return isa->cg->have_fp_insn ? 2 : 1;
}
/**
* Return the register class with requested index.
*/
static const arch_register_class_t *arm_get_reg_class(const void *self, int i) {
static const arch_register_class_t *arm_get_reg_class(const void *self,
unsigned i) {
(void) self;
assert(i < N_CLASSES);
return &arm_reg_classes[i];
}
......
......@@ -571,7 +571,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
/* Collect caller save registers */
for (i = 0, n = arch_isa_get_n_reg_class(isa); i < n; ++i) {
int j;
unsigned j;
const arch_register_class_t *cls = arch_isa_get_reg_class(isa, i);
for (j = 0; j < cls->n_regs; ++j) {
const arch_register_t *reg = arch_register_for_index(cls, j);
......@@ -1659,7 +1659,8 @@ static void modify_irg(be_abi_irg_t *env)
pset *dont_save = pset_new_ptr(8);
int n_params;
int i, j, n;
int i, n;
unsigned j;
reg_node_map_t *rm;
const arch_register_t *fp_reg;
......@@ -1923,7 +1924,7 @@ void fix_call_state_inputs(be_abi_irg_t *env)
/* Collect caller save registers */
n = arch_isa_get_n_reg_class(isa);
for(i = 0; i < n; ++i) {
int j;
unsigned j;
const arch_register_class_t *cls = arch_isa_get_reg_class(isa, i);
for(j = 0; j < cls->n_regs; ++j) {
const arch_register_t *reg = arch_register_for_index(cls, j);
......
......@@ -208,7 +208,7 @@ int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn, int pos
void arch_put_non_ignore_regs(const arch_env_t *env,
const arch_register_class_t *cls, bitset_t *bs)
{
int i;
unsigned i;
(void) env;
for(i = 0; i < cls->n_regs; ++i) {
......@@ -220,7 +220,7 @@ void arch_put_non_ignore_regs(const arch_env_t *env,
int arch_count_non_ignore_regs(const arch_env_t *env,
const arch_register_class_t *cls)
{
int i;
unsigned i;
int result = 0;
(void) env;
......
......@@ -60,8 +60,11 @@ typedef enum arch_register_type_t {
in the called function. */
arch_register_type_ignore = 4, /**< Do not consider this register when allocating. */
arch_register_type_joker = 8, /**< The emitter can choose an arbitrary register */
arch_register_type_virtual = 16, /**< This is just a virtual register */
arch_register_type_state = 32,
arch_register_type_virtual = 16, /**< This is just a virtual register.Virtual registers have
nearly no constraints, it is a allowed to have multiple
definition for the same register at a point) */
arch_register_type_state = 32, /**< The register represents a state that should be handled by
bestate code */
} arch_register_type_t;
/**
......
......@@ -40,7 +40,7 @@
struct arch_register_t {
const char *name; /**< The name of the register. */
const arch_register_class_t *reg_class; /**< The class the register belongs to. */
int index; /**< The index of the register in the class. */
unsigned index; /**< The index of the register in the class. */
arch_register_type_t type; /**< The type of the register. */
void *data; /**< Custom data. */
};
......@@ -52,7 +52,7 @@ _arch_register_get_class(const arch_register_t *reg)
}
static INLINE
int _arch_register_get_index(const arch_register_t *reg)
unsigned _arch_register_get_index(const arch_register_t *reg)
{
return reg->index;
}
......@@ -81,8 +81,9 @@ const char *_arch_register_get_name(const arch_register_t *reg)
* Like general purpose or floating point.
*/
struct arch_register_class_t {
unsigned index; /**< index of this register class */
const char *name; /**< The name of the register class.*/
int n_regs; /**< Number of registers in this
unsigned n_regs; /**< Number of registers in this
class. */
ir_mode *mode; /**< The mode of the register class.*/
const arch_register_t *regs; /**< The array of registers. */
......@@ -98,13 +99,16 @@ struct arch_register_class_t {
/** return the name of this register class */
#define arch_register_class_name(cls) ((cls)->name)
/** return the index of this register class */
#define arch_register_class_index(cls) ((cls)->index)
/** return the register class flags */
#define arch_register_class_flags(cls) ((cls)->flags)
static INLINE const arch_register_t *
_arch_register_for_index(const arch_register_class_t *cls, int idx)
_arch_register_for_index(const arch_register_class_t *cls, unsigned idx)
{
assert(0 <= idx && idx < cls->n_regs);
assert(idx < cls->n_regs);
return &cls->regs[idx];
}
......@@ -138,11 +142,6 @@ struct arch_register_req_t {
(case must_be_different). */
};
struct arch_flag_t {
const char *name;
unsigned index;
};
/**
* An inverse operation returned by the backend
*/
......@@ -437,14 +436,14 @@ struct arch_isa_if_t {
* Get the the number of register classes in the isa.
* @return The number of register classes.
*/
int (*get_n_reg_class)(const void *self);
unsigned (*get_n_reg_class)(const void *self);
/**
* Get the i-th register class.
* @param i The number of the register class.
* @return The register class.
*/
const arch_register_class_t *(*get_reg_class)(const void *self, int i);
const arch_register_class_t *(*get_reg_class)(const void *self, unsigned i);
/**
* Get the register class which shall be used to store a value of a given mode.
......
......@@ -856,7 +856,8 @@ void co_dump_appel_graph(const copy_opt_t *co, FILE *f)
ir_node *irn;
void *it, *nit;
int i, n, n_regs;
int n, n_regs;
unsigned i;
n_regs = 0;
for(i = 0; i < co->cls->n_regs; ++i) {
......@@ -1105,7 +1106,7 @@ static void appel_walker(ir_node *bl, void *data)
for(j = 0; j < insn->use_start; ++j) {
ir_node *op = insn->ops[j].carrier;
bitset_t *adm = insn->ops[j].regs;
int k;
unsigned k;
size_t nr;
if(!insn->ops[j].has_constraints)
......@@ -1201,8 +1202,8 @@ static void appel_inter_block_aff(ir_node *bl, void *data)
void co_dump_appel_graph_cliques(const copy_opt_t *co, FILE *f)
{
int i;
int n_colors;
unsigned i;
unsigned n_colors;
appel_clique_walker_t env;
bitset_t *adm = bitset_alloca(co->cls->n_regs);
be_lv_t *lv = co->cenv->birg->lv;
......@@ -1221,7 +1222,7 @@ void co_dump_appel_graph_cliques(const copy_opt_t *co, FILE *f)
env.color_map = alloca(co->cls->n_regs * sizeof(env.color_map[0]));
for(i = 0, n_colors = 0; i < co->cls->n_regs; ++i) {
const arch_register_t *reg = &co->cls->regs[i];
env.color_map[i] = arch_register_type_is(reg, ignore) ? -1 : n_colors++;
env.color_map[i] = arch_register_type_is(reg, ignore) ? -1 : (int) n_colors++;
}
env.dumb = 1;
......@@ -1233,7 +1234,7 @@ void co_dump_appel_graph_cliques(const copy_opt_t *co, FILE *f)
/* make the first k nodes interfere */
for(i = 0; i < n_colors; ++i) {
int j;
unsigned j;
for(j = i + 1; j < n_colors; ++j)
fprintf(f, "%d %d -1 ", i, j);
fprintf(f, "\n");
......
......@@ -178,14 +178,14 @@ static int get_pairidx_for_regidx(reg_pair_t *pairs, int n, int reg_idx, int in_
if (in_out) {
for (i = 0; i < n; i++) {
/* out register matches */
if (pairs[i].out_reg->index == reg_idx)
if ((int) pairs[i].out_reg->index == reg_idx)
return i;
}
}
else {
for (i = 0; i < n; i++) {
/* in register matches */
if (pairs[i].in_reg->index == reg_idx)
if ((int) pairs[i].in_reg->index == reg_idx)
return i;
}
}
......
......@@ -1179,11 +1179,13 @@ static int get_max_pressure_so_far(const block_info_t *bi, const bring_in_t *br)
#define block_last_bring_in(bi) list_entry((bi)->br_head.prev, bring_in_t, list)
#if 0
static int get_block_max_pressure(const block_info_t *bi)
{
int max = get_max_pressure_so_far(bi, block_last_bring_in(bi));
return MAX(bi->pressure, max);
}
#endif
/**
* Try to bring a variable into a block.
......
......@@ -654,16 +654,17 @@ static void mips_done(void *self)
free(isa);
}
static int mips_get_n_reg_class(const void *self)
static unsigned mips_get_n_reg_class(const void *self)
{
(void) self;
return N_CLASSES;
}
static const arch_register_class_t *mips_get_reg_class(const void *self, int i)
static const arch_register_class_t *mips_get_reg_class(const void *self,
unsigned i)
{
(void) self;
assert(i >= 0 && i < N_CLASSES && "Invalid mips register class requested.");
assert(i < N_CLASSES);
return &mips_reg_classes[i];
}
......
......@@ -735,14 +735,15 @@ static void ppc32_done(void *self) {
static int ppc32_get_n_reg_class(const void *self) {
static unsigned ppc32_get_n_reg_class(const void *self) {
(void) self;
return N_CLASSES;
}
static const arch_register_class_t *ppc32_get_reg_class(const void *self, int i) {
static const arch_register_class_t *ppc32_get_reg_class(const void *self,
unsigned i) {
(void) self;
assert(i >= 0 && i < N_CLASSES && "Invalid ppc register class requested.");
assert(i < N_CLASSES && "Invalid ppc register class requested.");
return &ppc32_reg_classes[i];
}
......
......@@ -142,7 +142,7 @@ foreach my $class_name (keys(%reg_classes)) {
push(@obst_regtypes_decl, "extern const arch_register_t ${class_name}_regs[$numregs];\n");
push(@obst_classdef, "\tCLASS_$class_name = $class_idx,\n");
push(@obst_regclasses, "{ \"$class_name\", $numregs, NULL, ".$class_name."_regs, $flags_prepared }");
push(@obst_regclasses, "{ $class_idx, \"$class_name\", $numregs, NULL, ".$class_name."_regs, $flags_prepared }");
my $idx = 0;
push(@obst_reginit, "\t/* set largest possible mode for '$class_name' */\n");
......
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