Add arch_get_register_req_out().

[r22896]

ir/be/bearch.h

@@ -130,6 +130,8 @@ void            arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsign
  */
 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
 
+#define arch_get_register_req_out(irn) arch_get_register_req(irn, -1)
+
 /**
  * Get the number of allocatable registers concerning
  * a register class for an operand of a node.

ir/be/becopyheur.c

@@ -275,7 +275,7 @@ static ir_node *qnode_color_irn(const qnode_t *qn, ir_node *irn, int col, const
 		bitset_flip_all(free_cols);
 
 		/* Exclude colors not assignable to the irn */
-		req = arch_get_register_req(irn, -1);
+		req = arch_get_register_req_out(irn);
 		if (arch_register_req_is(req, limited)) {
 			bitset_t *limited = bitset_alloca(cls->n_regs);
 			rbitset_copy_to_bitset(req->limited, limited);

ir/be/becopyheur2.c

@@ -264,7 +264,7 @@ static inline bitset_t *get_adm(co2_t *env, co2_irn_t *ci)
 	if(ci->adm_cache == NULL) {
 		const arch_register_req_t *req;
 		ci->adm_cache = bitset_obstack_alloc(phase_obst(&env->ph), env->n_regs);
-		req = arch_get_register_req(ci->irn, BE_OUT_POS(0));
+		req = arch_get_register_req_out(ci->irn);
 
 		if(arch_register_req_is(req, limited)) {
 			int i, n;
@@ -305,9 +305,7 @@ static inline int is_constrained(co2_t *env, co2_irn_t *ci)
 
 static void incur_constraint_costs(co2_t *env, const ir_node *irn, col_cost_pair_t *col_costs, int costs)
 {
-	const arch_register_req_t *req;
-
-	req = arch_get_register_req(irn, BE_OUT_POS(0));
+	const arch_register_req_t *req = arch_get_register_req_out(irn);
 
 	if (arch_register_req_is(req, limited)) {
 		unsigned n_regs   = env->co->cls->n_regs;
@@ -1153,9 +1151,8 @@ static const char *get_dot_color_name(size_t col)
 
 static const char *get_dot_shape_name(co2_irn_t *ci)
 {
-	const arch_register_req_t *req;
+	const arch_register_req_t *req = arch_get_register_req_out(ci->irn);
 
-	req = arch_get_register_req(ci->irn, BE_OUT_POS(0));
 	if(arch_register_req_is(req, limited))
 		return "diamond";
 

ir/be/becopyheur4.c

@@ -378,7 +378,7 @@ static void *co_mst_irn_init(ir_phase *ph, const ir_node *irn, void *old) {
 		res->adm_colors = bitset_obstack_alloc(phase_obst(ph), env->n_regs);
 
 		/* Exclude colors not assignable to the irn */
-		req = arch_get_register_req(irn, -1);
+		req = arch_get_register_req_out(irn);
 		if (arch_register_req_is(req, limited))
 			rbitset_copy_to_bitset(req->limited, res->adm_colors);
 		else

ir/be/becopyilp.c

@@ -138,7 +138,7 @@ void sr_remove(size_red_t *sr) {
 	while (redo) {
 		redo = 0;
 		be_ifg_foreach_node(ifg, iter, irn) {
-			const arch_register_req_t *req = arch_get_register_req(irn, -1);
+			const arch_register_req_t *req = arch_get_register_req_out(irn);
 
 			if (!arch_register_req_is(req, limited) && !sr_is_removed(sr, irn) && !co_gs_is_optimizable(sr->co, irn)) {
 				if (sr_is_simplicial(sr, irn)) {

ir/be/becopyilp2.c

@@ -89,7 +89,7 @@ static void build_coloring_cstr(ilp_env_t *ienv) {
 
 			pmap_insert(lenv->nr_2_irn, INT_TO_PTR(node_nr), irn);
 
-			req = arch_get_register_req(irn, -1);
+			req = arch_get_register_req_out(irn);
 
 			bitset_clear_all(colors);
 

ir/be/becopyopt.c

@@ -232,7 +232,7 @@ static int co_is_optimizable_root(ir_node *irn)
 	if (is_Reg_Phi(irn) || is_Perm_Proj(irn))
 		return 1;
 
-	req = arch_get_register_req(irn, -1);
+	req = arch_get_register_req_out(irn);
 	if (is_2addr_code(req))
 		return 1;
 
@@ -381,7 +381,7 @@ static int ou_max_ind_set_costs(unit_t *ou) {
 
 static void co_collect_units(ir_node *irn, void *env)
 {
-	const arch_register_req_t *req = arch_get_register_req(irn, -1);
+	const arch_register_req_t *req = arch_get_register_req_out(irn);
 	copy_opt_t                *co  = env;
 	unit_t *unit;
 
@@ -530,7 +530,7 @@ static int compare_ous(const void *k1, const void *k2) {
 	/* Units with constraints come first */
 	u1_has_constr = 0;
 	for (i=0; i<u1->node_count; ++i) {
-		arch_get_register_req(&req, u1->nodes[i], -1);
+		arch_get_register_req_out(&req, u1->nodes[i]);
 		if (arch_register_req_is(&req, limited)) {
 			u1_has_constr = 1;
 			break;
@@ -539,7 +539,7 @@ static int compare_ous(const void *k1, const void *k2) {
 
 	u2_has_constr = 0;
 	for (i=0; i<u2->node_count; ++i) {
-		arch_get_register_req(&req, u2->nodes[i], -1);
+		arch_get_register_req_out(&req, u2->nodes[i]);
 		if (arch_register_req_is(&req, limited)) {
 			u2_has_constr = 1;
 			break;
@@ -772,7 +772,7 @@ static inline void add_edges(copy_opt_t *co, ir_node *n1, ir_node *n2, int costs
 }
 
 static void build_graph_walker(ir_node *irn, void *env) {
-	const arch_register_req_t *req = arch_get_register_req(irn, -1);
+	const arch_register_req_t *req = arch_get_register_req_out(irn);
 	copy_opt_t                *co  = env;
 	int pos, max;
 	const arch_register_t *reg;
@@ -842,14 +842,13 @@ static int co_dump_appel_disjoint_constraints(const copy_opt_t *co, ir_node *a,
 {
 	ir_node *nodes[]  = { a, b };
 	bitset_t *constr[] = { NULL, NULL };
-	const arch_register_req_t *req;
 	int j;
 
 	constr[0] = bitset_alloca(co->cls->n_regs);
 	constr[1] = bitset_alloca(co->cls->n_regs);
 
 	for (j = 0; j < 2; ++j) {
-		req = arch_get_register_req(nodes[j], BE_OUT_POS(0));
+		const arch_register_req_t *req = arch_get_register_req_out(nodes[j]);
 		if(arch_register_req_is(req, limited))
 			rbitset_copy_to_bitset(req->limited, constr[j]);
 		else
@@ -895,13 +894,11 @@ void co_dump_appel_graph(const copy_opt_t *co, FILE *f)
 
 	be_ifg_foreach_node(ifg, it, irn) {
 		if (!arch_irn_is(irn, ignore)) {
-			int idx            = node_map[get_irn_idx(irn)];
-			affinity_node_t *a = get_affinity_info(co, irn);
-
-			const arch_register_req_t *req;
-			ir_node *adj;
+			int idx                        = node_map[get_irn_idx(irn)];
+			affinity_node_t           *a   = get_affinity_info(co, irn);
+			const arch_register_req_t *req = arch_get_register_req_out(irn);
+			ir_node                   *adj;
 
-			req = arch_get_register_req(irn, BE_OUT_POS(0));
 			if(arch_register_req_is(req, limited)) {
 				for(i = 0; i < co->cls->n_regs; ++i) {
 					if(!rbitset_is_set(req->limited, i) && color_map[i] >= 0)
@@ -1002,13 +999,10 @@ static int ifg_is_dump_node(void *self, ir_node *irn)
 
 static void ifg_dump_node_attr(FILE *f, void *self, ir_node *irn)
 {
-	co_ifg_dump_t *env         = self;
-	const arch_register_t *reg = arch_get_irn_register(irn);
-	const arch_register_req_t *req;
-	int limited;
-
-	req = arch_get_register_req(irn, BE_OUT_POS(0));
-	limited = arch_register_req_is(req, limited);
+	co_ifg_dump_t             *env     = self;
+	const arch_register_t     *reg     = arch_get_irn_register(irn);
+	const arch_register_req_t *req     = arch_get_register_req_out(irn);
+	int                        limited = arch_register_req_is(req, limited);
 
 	if(env->flags & CO_IFG_DUMP_LABELS) {
 		ir_fprintf(f, "label=\"%+F", irn);

ir/be/beinsn.c

@@ -105,7 +105,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn)
 
 			if (arch_irn_consider_in_reg_alloc(env->cls, p)) {
 				/* found a def: create a new operand */
-				o.req             = arch_get_register_req(p, -1);
+				o.req             = arch_get_register_req_out(p);
 				o.carrier         = p;
 				o.irn             = irn;
 				o.pos             = -(get_Proj_proj(p) + 1);
@@ -119,7 +119,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn)
 		}
 	} else if (arch_irn_consider_in_reg_alloc(env->cls, irn)) {
 		/* only one def, create one operand */
-		o.req     = arch_get_register_req(irn, -1);
+		o.req     = arch_get_register_req_out(irn);
 		o.carrier = irn;
 		o.irn     = irn;
 		o.pos     = -1;

ir/be/belower.c

@@ -578,7 +578,7 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different,
  * @param env          the constraint environment
  */
 static void assure_different_constraints(ir_node *irn, ir_node *skipped_irn, constraint_env_t *env) {
-	const arch_register_req_t *req = arch_get_register_req(irn, -1);
+	const arch_register_req_t *req = arch_get_register_req_out(irn);
 
 	if (arch_register_req_is(req, must_be_different)) {
 		const unsigned other = req->other_different;
@@ -930,7 +930,7 @@ found_front:
 			req = arch_get_register_req(get_Proj_pred(node),
 			                            -1 - get_Proj_proj(node));
 		} else {
-			req = arch_get_register_req(node, -1);
+			req = arch_get_register_req_out(node);
 		}
 		if (req->type != arch_register_req_type_normal)
 			break;

ir/be/benode.c

@@ -1288,7 +1288,7 @@ const arch_register_req_t *get_Phi_reg_req_recursive(const ir_node *phi,
 		/* Matze: don't we unnecessary constraint our phis with this?
 		 * we only need to take the regclass IMO*/
 		if(!is_Phi(op))
-			return arch_get_register_req(op, BE_OUT_POS(0));
+			return arch_get_register_req_out(op);
 	}
 
 	/*

ir/be/ia32/ia32_transform.c

@@ -4380,7 +4380,7 @@ static ir_node *gen_Proj_be_Call(ir_node *node)
 	} else if (proj == pn_be_Call_M_regular) {
 		proj = pn_ia32_Call_M;
 	} else {
-		arch_register_req_t const *const req    = arch_get_register_req(node, -1);
+		arch_register_req_t const *const req    = arch_get_register_req_out(node);
 		int                        const n_outs = get_ia32_n_res(new_call);
 		int                              i;