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Commit bd2375e2 authored by Christoph Mallon's avatar Christoph Mallon
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be: Introduce a generic be_Asm node.

parent a2e4439a
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ir/be/amd64/amd64_emitter.c
View file @ bd2375e2
......@@ -637,8 +637,8 @@ static void emit_amd64_asm_operand(ir_node const *const node, char const modifie
return;
}
amd64_asm_attr_t const *const attr = get_amd64_asm_attr_const(node);
x86_asm_operand_t const *const op = &attr->asmattr.operands[pos];
be_asm_attr_t const *const attr = get_be_asm_attr_const(node);
x86_asm_operand_t const *const op = &((x86_asm_operand_t const*)attr->operands)[pos];
switch ((x86_asm_operand_kind_t)op->kind) {
case ASM_OP_INVALID:
panic("invalid asm operand");
......@@ -672,8 +672,7 @@ static void emit_amd64_asm_operand(ir_node const *const node, char const modifie
static void emit_amd64_asm(const ir_node *node)
{
amd64_asm_attr_t const *const attr = get_amd64_asm_attr_const(node);
be_emit_asm(node, attr->asmattr.asm_text, ARR_LEN(attr->asmattr.operands), emit_amd64_asm_operand);
be_emit_asm(node, emit_amd64_asm_operand);
}
/**
......@@ -845,11 +844,11 @@ static void amd64_register_emitters(void)
/* register all emitter functions defined in spec */
amd64_register_spec_emitters();
be_set_emitter(op_amd64_asm, emit_amd64_asm);
be_set_emitter(op_amd64_jcc, emit_amd64_jcc);
be_set_emitter(op_amd64_jmp, emit_amd64_jmp);
be_set_emitter(op_amd64_jmp_switch, emit_amd64_jmp_switch);
be_set_emitter(op_amd64_mov_gp, emit_amd64_mov_gp);
be_set_emitter(op_be_Asm, emit_amd64_asm);
be_set_emitter(op_be_Copy, emit_be_Copy);
be_set_emitter(op_be_CopyKeep, emit_be_Copy);
be_set_emitter(op_be_IncSP, emit_be_IncSP);
......
ir/be/amd64/amd64_new_nodes.c
View file @ bd2375e2
......@@ -179,14 +179,6 @@ static int amd64_attrs_equal(const ir_node *a, const ir_node *b)
return attr_a->op_mode == attr_b->op_mode;
}
static int amd64_asm_attrs_equal(const ir_node *a, const ir_node *b)
{
const amd64_asm_attr_t *attr_a = get_amd64_asm_attr_const(a);
const amd64_asm_attr_t *attr_b = get_amd64_asm_attr_const(b);
return amd64_attrs_equal(a, b)
&& x86_asm_attr_equal(&attr_a->asmattr, &attr_b->asmattr);
}
static int amd64_addr_attrs_equal(const ir_node *a, const ir_node *b)
{
const amd64_addr_attr_t *attr_a = get_amd64_addr_attr_const(a);
......
ir/be/amd64/amd64_new_nodes.h
View file @ bd2375e2
......@@ -55,13 +55,6 @@ static inline amd64_addr_attr_t *get_amd64_addr_attr(ir_node *node)
return (amd64_addr_attr_t*)get_irn_generic_attr(node);
}
static inline const amd64_asm_attr_t *get_amd64_asm_attr_const(
const ir_node *node)
{
assert(is_amd64_asm(node));
return (const amd64_asm_attr_t*)get_irn_generic_attr_const(node);
}
static inline const amd64_addr_attr_t *get_amd64_addr_attr_const(
const ir_node *node)
{
......
ir/be/amd64/amd64_nodes_attr.h
View file @ bd2375e2
......@@ -90,11 +90,6 @@ typedef struct {
ENUMBF(amd64_op_mode_t) op_mode : 4;
} amd64_attr_t;
typedef struct {
amd64_attr_t base;
x86_asm_attr_t asmattr;
} amd64_asm_attr_t;
typedef struct {
amd64_attr_t base;
bool needs_frame_ent : 1;
......
ir/be/amd64/amd64_spec.pl
View file @ bd2375e2
......@@ -77,9 +77,6 @@ $default_copy_attr = "amd64_copy_attr";
"init_amd64_attributes(res, irn_flags_, in_reqs, n_res, op_mode);\n"
."\tattr->insn_mode = insn_mode;\n"
."\tattr->addr = addr;",
amd64_asm_attr_t =>
"init_amd64_attributes(res, irn_flags_, in_reqs, n_res, op_mode);\n"
."\tattr->asmattr = *asmattr;\n",
amd64_binop_addr_attr_t =>
"be_info_init_irn(res, irn_flags_, in_reqs, n_res);\n"
."\t*attr = *attr_init;",
......@@ -282,14 +279,6 @@ and => {
emit => "and%M %AM",
},
asm => {
in_reqs => "...",
out_reqs => "...",
attr_type => "amd64_asm_attr_t",
attr => "const x86_asm_attr_t *asmattr",
fixed => "amd64_op_mode_t op_mode = AMD64_OP_NONE;\n",
},
div => {
template => $divop,
emit => "div%M %AM",
......
ir/be/amd64/amd64_transform.c
View file @ bd2375e2
......@@ -1941,8 +1941,7 @@ static ir_node *gen_Cond(ir_node *node)
static ir_node *gen_ASM(ir_node *node)
{
return x86_match_ASM(node, new_bd_amd64_asm, amd64_additional_clobber_names,
&amd64_asm_constraints);
return x86_match_ASM(node, amd64_additional_clobber_names, &amd64_asm_constraints);
}
static ir_node *gen_Proj_ASM(ir_node *node)
......
ir/be/beasm.c
View file @ bd2375e2
......@@ -9,6 +9,7 @@
#include "beasm.h"
#include "bediagnostic.h"
#include "beemitter.h"
#include "benode.h"
#include "ident_t.h"
#include "panic.h"
#include "util.h"
......@@ -148,16 +149,19 @@ void be_parse_asm_constraints_internal(be_asm_constraint_t *const constraint, id
constraint->immediate_type = immediate_type;
}
void be_emit_asm(ir_node const *const asmn, ident *const text, unsigned const n_operands, be_emit_asm_operand_func *const emit_asm_operand)
void be_emit_asm(ir_node const *const asmn, be_emit_asm_operand_func *const emit_asm_operand)
{
be_emit_cstring("#APP");
be_emit_finish_line_gas(asmn);
char const *s = get_id_str(text);
be_asm_attr_t const *const attr = get_be_asm_attr_const(asmn);
char const *s = get_id_str(attr->text);
if (s[0] != '\t')
be_emit_char('\t');
char const *last = s;
char const *last = s;
unsigned const n_operands = ARR_LEN(attr->operands);
while ((s = strchr(s, '%'))) {
be_emit_string_len(last, s - last);
++s; /* Skip '%'. */
......
ir/be/beasm.h
View file @ bd2375e2
......@@ -34,6 +34,6 @@ void be_parse_asm_constraints_internal(be_asm_constraint_t *constraint, ident *c
typedef void be_emit_asm_operand_func(ir_node const *asmn, char modifier, unsigned pos);
void be_emit_asm(ir_node const *asmn, ident *text, unsigned n_operands, be_emit_asm_operand_func *emit_asm_operand);
void be_emit_asm(ir_node const *asmn, be_emit_asm_operand_func *emit_asm_operand);
#endif
ir/be/benode.c
View file @ bd2375e2
......@@ -40,10 +40,6 @@
#include "set.h"
#include "util.h"
typedef struct be_node_attr_t {
except_attr exc;
} be_node_attr_t;
/** The be_IncSP attribute type. */
typedef struct {
be_node_attr_t base;
......@@ -60,6 +56,7 @@ typedef struct {
} be_memperm_attr_t;
ir_op *op_be_AnyVal;
ir_op *op_be_Asm;
ir_op *op_be_Copy;
ir_op *op_be_CopyKeep;
ir_op *op_be_IncSP;
......@@ -69,6 +66,13 @@ ir_op *op_be_Perm;
#define be_op_tag FOURCC('B', 'E', '\0', '\0')
static int be_asm_attr_equal(ir_node const *const a, ir_node const *const b)
{
be_asm_attr_t const *const attr_a = get_be_asm_attr_const(a);
be_asm_attr_t const *const attr_b = get_be_asm_attr_const(b);
return attr_a->text == attr_b->text && attr_a->operands == attr_b->operands;
}
/**
* Compare the attributes of two be_IncSP nodes.
*/
......@@ -493,6 +497,19 @@ void be_dump_phi_reg_reqs(FILE *F, const ir_node *node, dump_reason_t reason)
}
}
ir_node *be_new_Asm(dbg_info *const dbgi, ir_node *const block, int const n_ins, ir_node **const ins, int const n_outs, ident *const text, void *const operands)
{
ir_graph *const irg = get_irn_irg(block);
ir_node *const asmn = new_ir_node(dbgi, irg, block, op_be_Asm, mode_T, n_ins, ins);
be_info_init_irn(asmn, arch_irn_flags_none, NULL, n_outs);
be_asm_attr_t *const attr = (be_asm_attr_t*)get_irn_generic_attr(asmn);
attr->text = text;
attr->operands = operands;
return asmn;
}
/**
* ir_op-Operation: dump a be node to file
*/
......@@ -600,6 +617,7 @@ void be_init_op(void)
/* Acquire all needed opcodes. */
unsigned const o = get_next_ir_opcodes(beo_last + 1);
op_be_AnyVal = new_be_op(o+beo_AnyVal, "be_AnyVal", op_pin_state_exc_pinned, irop_flag_constlike|irop_flag_cse_neutral, oparity_any, sizeof(be_node_attr_t));
op_be_Asm = new_be_op(o+beo_Asm, "be_Asm", op_pin_state_exc_pinned, irop_flag_none, oparity_any, sizeof(be_asm_attr_t));
op_be_Copy = new_be_op(o+beo_Copy, "be_Copy", op_pin_state_exc_pinned, irop_flag_none, oparity_any, sizeof(be_node_attr_t));
op_be_CopyKeep = new_be_op(o+beo_CopyKeep, "be_CopyKeep", op_pin_state_exc_pinned, irop_flag_keep, oparity_variable, sizeof(be_node_attr_t));
op_be_IncSP = new_be_op(o+beo_IncSP, "be_IncSP", op_pin_state_exc_pinned, irop_flag_none, oparity_any, sizeof(be_incsp_attr_t));
......@@ -607,6 +625,7 @@ void be_init_op(void)
op_be_MemPerm = new_be_op(o+beo_MemPerm, "be_MemPerm", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, sizeof(be_memperm_attr_t));
op_be_Perm = new_be_op(o+beo_Perm, "be_Perm", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, sizeof(be_node_attr_t));
set_op_attrs_equal(op_be_Asm, be_asm_attr_equal);
set_op_attrs_equal(op_be_AnyVal, attrs_equal_be_node);
set_op_attrs_equal(op_be_Copy, attrs_equal_be_node);
set_op_attrs_equal(op_be_CopyKeep, attrs_equal_be_node);
......
ir/be/benode.h
View file @ bd2375e2
......@@ -22,6 +22,7 @@
typedef enum be_opcode {
beo_AnyVal,
beo_first = beo_AnyVal,
beo_Asm,
beo_Copy,
beo_CopyKeep,
beo_IncSP,
......@@ -31,7 +32,18 @@ typedef enum be_opcode {
beo_last = beo_Perm
} be_opcode;
typedef struct be_node_attr_t {
except_attr exc;
} be_node_attr_t;
typedef struct be_asm_attr_t {
be_node_attr_t base;
ident *text;
void *operands;
} be_asm_attr_t;
extern ir_op *op_be_AnyVal;
extern ir_op *op_be_Asm;
extern ir_op *op_be_Copy;
extern ir_op *op_be_CopyKeep;
extern ir_op *op_be_IncSP;
......@@ -176,11 +188,14 @@ ir_node *be_new_Phi0(ir_node *block, ir_mode *mode, arch_register_req_t const *r
*/
ir_node *be_complete_Phi(ir_node *phi, unsigned n_ins, ir_node **ins);
ir_node *be_new_Asm(dbg_info *dbgi, ir_node *block, int n_ins, ir_node **ins, int n_outs, ident *text, void *operands);
/**
* Search for output of start node with a specific register
*/
ir_node *be_get_initial_reg_value(ir_graph *irg, const arch_register_t *reg);
static inline bool be_is_Asm (const ir_node *irn) { return get_irn_op(irn) == op_be_Asm ; }
static inline bool be_is_Copy (const ir_node *irn) { return get_irn_op(irn) == op_be_Copy ; }
static inline bool be_is_CopyKeep(const ir_node *irn) { return get_irn_op(irn) == op_be_CopyKeep ; }
static inline bool be_is_Perm (const ir_node *irn) { return get_irn_op(irn) == op_be_Perm ; }
......@@ -188,4 +203,10 @@ static inline bool be_is_MemPerm (const ir_node *irn) { return get_irn_op(irn) =
static inline bool be_is_Keep (const ir_node *irn) { return get_irn_op(irn) == op_be_Keep ; }
static inline bool be_is_IncSP (const ir_node *irn) { return get_irn_op(irn) == op_be_IncSP ; }
static inline be_asm_attr_t const *get_be_asm_attr_const(ir_node const *const asmn)
{
assert(be_is_Asm(asmn));
return (be_asm_attr_t const*)get_irn_generic_attr_const(asmn);
}
#endif
ir/be/ia32/ia32_emitter.c
View file @ bd2375e2
......@@ -914,8 +914,8 @@ static void emit_ia32_asm_operand(ir_node const *const node, char const modifier
return;
}
ia32_asm_attr_t const *const attr = get_ia32_asm_attr_const(node);
x86_asm_operand_t const *const op = &attr->asmattr.operands[pos];
be_asm_attr_t const *const attr = get_be_asm_attr_const(node);
x86_asm_operand_t const *const op = &((x86_asm_operand_t const*)attr->operands)[pos];
switch ((x86_asm_operand_kind_t)op->kind) {
case ASM_OP_INVALID:
panic("invalid asm operand");
......@@ -950,8 +950,7 @@ static void emit_ia32_asm_operand(ir_node const *const node, char const modifier
*/
static void emit_ia32_Asm(const ir_node *node)
{
ia32_asm_attr_t const *const attr = get_ia32_asm_attr_const(node);
be_emit_asm(node, attr->asmattr.asm_text, ARR_LEN(attr->asmattr.operands), emit_ia32_asm_operand);
be_emit_asm(node, emit_ia32_asm_operand);
}
/**
......@@ -1226,12 +1225,12 @@ static void ia32_register_emitters(void)
/* register all emitter functions defined in spec */
ia32_register_spec_emitters();
be_set_emitter(op_be_Asm, emit_ia32_Asm);
be_set_emitter(op_be_Copy, emit_be_Copy);
be_set_emitter(op_be_CopyKeep, emit_be_CopyKeep);
be_set_emitter(op_be_IncSP, emit_be_IncSP);
be_set_emitter(op_be_Perm, emit_be_Perm);
be_set_emitter(op_ia32_Return, emit_ia32_Return);
be_set_emitter(op_ia32_Asm, emit_ia32_Asm);
be_set_emitter(op_ia32_ClimbFrame, emit_ia32_ClimbFrame);
be_set_emitter(op_ia32_Conv_FP2FP, emit_ia32_Conv_FP2FP);
be_set_emitter(op_ia32_Conv_FP2I, emit_ia32_Conv_FP2I);
......@@ -2963,6 +2962,7 @@ static void ia32_register_binary_emitters(void)
ir_clear_opcodes_generic_func();
/* benode emitter */
be_set_emitter(op_be_Asm, emit_ia32_Asm); // TODO implement binary emitter
be_set_emitter(op_be_Copy, bemit_copy);
be_set_emitter(op_be_CopyKeep, bemit_copy);
be_set_emitter(op_be_IncSP, bemit_incsp);
......@@ -2973,7 +2973,6 @@ static void ia32_register_binary_emitters(void)
be_set_emitter(op_ia32_AddMem, bemit_addmem);
be_set_emitter(op_ia32_And, bemit_and);
be_set_emitter(op_ia32_AndMem, bemit_andmem);
be_set_emitter(op_ia32_Asm, emit_ia32_Asm); // TODO implement binary emitter
be_set_emitter(op_ia32_Breakpoint, bemit_int3);
be_set_emitter(op_ia32_Bsf, bemit_bsf);
be_set_emitter(op_ia32_Bsr, bemit_bsr);
......
ir/be/ia32/ia32_new_nodes.c
View file @ bd2375e2
......@@ -317,14 +317,6 @@ const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node)
return x87_attr;
}
const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node)
{
const ia32_attr_t *attr = get_ia32_attr_const(node);
const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
return asm_attr;
}
ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node)
{
ia32_attr_t *attr = get_ia32_attr(node);
......@@ -776,17 +768,6 @@ static void init_ia32_x87_attributes(ir_node *res)
ia32_request_x87_sim(irg);
}
static void init_ia32_asm_attributes(ir_node *res)
{
#ifndef NDEBUG
ia32_attr_t *attr = get_ia32_attr(res);
attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
#endif
ir_graph *const irg = get_irn_irg(res);
ia32_request_x87_sim(irg); /* asm might have fp operands. */
}
static void init_ia32_immediate_attributes(ir_node *res, ir_entity *entity,
bool no_pic_adjust, int32_t offset)
{
......@@ -920,15 +901,6 @@ static int ia32_copyb_attrs_equal(const ir_node *a, const ir_node *b)
&& attr_a->size == attr_b->size;
}
/** Compare ASM node attributes. */
static int ia32_asm_attrs_equal(const ir_node *a, const ir_node *b)
{
const ia32_asm_attr_t *attr_a = get_ia32_asm_attr_const(a);
const ia32_asm_attr_t *attr_b = get_ia32_asm_attr_const(b);
return ia32_attrs_equal_(&attr_a->attr, &attr_b->attr)
&& x86_asm_attr_equal(&attr_a->asmattr, &attr_b->asmattr);
}
/**
* Hash function for Immediates
*/
......
ir/be/ia32/ia32_new_nodes.h
View file @ bd2375e2
......@@ -49,8 +49,6 @@ const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node);
ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node);
const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node);
const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node);
/**
* Gets the condcode attributes of a node.
*/
......
ir/be/ia32/ia32_nodes_attr.h
View file @ bd2375e2
......@@ -185,15 +185,6 @@ struct ia32_x87_attr_t {
bool pop; /**< Emit a pop suffix. */
};
/**
* The attributes for ASM nodes.
*/
typedef struct ia32_asm_attr_t ia32_asm_attr_t;
struct ia32_asm_attr_t {
ia32_attr_t attr; /**< the generic attribute */
x86_asm_attr_t asmattr;
};
/**
* The attributes for the ClimbFrame node.
*/
......@@ -218,7 +209,6 @@ union allow_casts_attr_t_ {
ia32_condcode_attr_t cc_attr;
ia32_copyb_attr_t cpy_attr;
ia32_x87_attr_t x87_attr;
ia32_asm_attr_t asm_attr;
ia32_immediate_attr_t immediate_attr;
ia32_climbframe_attr_t climbframe_attr;
ia32_switch_attr_t switch_attr;
......
ir/be/ia32/ia32_spec.pl
View file @ bd2375e2
......@@ -101,9 +101,6 @@ sub ia32_custom_init_attr {
$custom_init_attr_func = \&ia32_custom_init_attr;
%init_attr = (
ia32_asm_attr_t =>
"\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_asm_attributes(res);",
ia32_attr_t =>
"\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);",
ia32_call_attr_t =>
......@@ -396,16 +393,6 @@ Immediate => {
mode => $mode_gp,
},
Asm => {
in_reqs => "...",
out_reqs => "...",
attr_type => "ia32_asm_attr_t",
attr => "const x86_asm_attr_t *asmattr",
init_attr => "attr->asmattr = *asmattr;",
latency => 10,
modified_flags => $status_flags,
},
Add => {
template => $binop_commutative,
emit => "add%M %B",
......
ir/be/ia32/ia32_transform.c
View file @ bd2375e2
......@@ -5610,11 +5610,8 @@ ir_node *ia32_new_IncSP(ir_node *block, ir_node *old_sp, int offset,
static ir_node *gen_ASM(ir_node *node)
{
ir_node *new_node = x86_match_ASM(node, new_bd_ia32_Asm,
ia32_additional_clobber_names,
&ia32_asm_constraints);
SET_IA32_ORIG_NODE(new_node, node);
return new_node;
ia32_request_x87_sim(get_irn_irg(node)); /* asm might have fp operands. */
return x86_match_ASM(node, ia32_additional_clobber_names, &ia32_asm_constraints);
}
static ir_node *gen_Proj_ASM(ir_node *node)
......
ir/be/ia32/ia32_x87.c
View file @ bd2375e2
......@@ -1262,8 +1262,7 @@ static bool is_clobber(ir_node const *const asm_n, ir_node const *const value)
return false;
unsigned const num = get_Proj_num(value);
ia32_asm_attr_t const *const attr = get_ia32_asm_attr_const(asm_n);
x86_asm_operand_t const *const operands = attr->asmattr.operands;
x86_asm_operand_t const *const operands = (x86_asm_operand_t const*)get_be_asm_attr_const(asm_n)->operands;
for (size_t i = 0, n = ARR_LEN(operands); i != n; ++i) {
x86_asm_operand_t const *const op = &operands[i];
if (op->kind == ASM_OP_OUT_REG && op->inout_pos == num)
......@@ -1449,10 +1448,10 @@ static void x87_init_simulator(x87_simulator *sim, ir_graph *irg)
/* set the generic function pointer of instruction we must simulate */
ir_clear_opcodes_generic_func();
register_sim(op_be_Asm, sim_Asm);
register_sim(op_be_Copy, sim_Copy);
register_sim(op_be_Keep, sim_Keep);
register_sim(op_be_Perm, sim_Perm);
register_sim(op_ia32_Asm, sim_Asm);
register_sim(op_ia32_Call, sim_Call);
register_sim(op_ia32_fabs, sim_unop);
register_sim(op_ia32_fadd, sim_binop);
......
ir/be/ia32/x86_asm.c
View file @ bd2375e2
......@@ -186,9 +186,7 @@ static void set_operand_if_invalid(x86_asm_operand_t *const op, x86_asm_operand_
}
}
ir_node *x86_match_ASM(const ir_node *node, new_bd_asm_func new_bd_asm,
const x86_clobber_name_t *additional_clobber_names,
const x86_asm_constraint_list_t *constraints)
ir_node *x86_match_ASM(ir_node const *const node, x86_clobber_name_t const *const additional_clobber_names, x86_asm_constraint_list_t const *const constraints)
{
int const n_inputs = get_ASM_n_inputs(node);
size_t const n_out_constraints = get_ASM_n_output_constraints(node);
......@@ -360,11 +358,11 @@ ir_node *x86_match_ASM(const ir_node *node, new_bd_asm_func new_bd_asm,
ARR_APP1(arch_register_req_t const*, in_reqs, arch_no_register_req);
ARR_APP1(arch_register_req_t const*, out_reqs, arch_no_register_req);
dbg_info *const dbgi = get_irn_dbg_info(node);
x86_asm_attr_t const attr = { get_ASM_text(node), operands };
size_t const n_ins = ARR_LEN(in);
size_t const n_outs = ARR_LEN(out_reqs);
ir_node *const new_node = new_bd_asm(dbgi, block, n_ins, in, n_outs, &attr);
dbg_info *const dbgi = get_irn_dbg_info(node);
size_t const n_ins = ARR_LEN(in);
size_t const n_outs = ARR_LEN(out_reqs);
ident *const text = get_ASM_text(node);
ir_node *const new_node = be_new_Asm(dbgi, block, n_ins, in, n_outs, text, operands);
backend_info_t *const info = be_get_info(new_node);
for (size_t o = 0; o < n_outs; ++o) {
......
ir/be/ia32/x86_asm.h
View file @ bd2375e2
......@@ -41,11 +41,6 @@ typedef struct x86_asm_operand_t {
} u;
} x86_asm_operand_t;
typedef struct x86_asm_attr_t {
ident *asm_text;
const x86_asm_operand_t *operands;
} x86_asm_attr_t;
typedef struct x86_clobber_name_t {
const char *name;
unsigned index;
......@@ -67,24 +62,12 @@ typedef struct x86_asm_constraint_t {
typedef x86_asm_constraint_t x86_asm_constraint_list_t[128];
static inline bool x86_asm_attr_equal(const x86_asm_attr_t *attr0,
const x86_asm_attr_t *attr1)
{
return attr0->asm_text == attr1->asm_text;
}
typedef void (*emit_register_func)(const arch_register_t *reg, char modifier,
ir_mode *mode);
arch_register_t const *x86_parse_clobber(x86_clobber_name_t const *additional_clobber_names, char const *name);
typedef ir_node* (*new_bd_asm_func)(dbg_info *dbgi, ir_node *block, int arity,
ir_node *in[], int out_arity,
const x86_asm_attr_t *attr);
ir_node *x86_match_ASM(const ir_node *node, new_bd_asm_func new_bd_asm,
const x86_clobber_name_t *names,
const x86_asm_constraint_list_t *constraints);
ir_node *x86_match_ASM(ir_node const *node, x86_clobber_name_t const *names, x86_asm_constraint_list_t const *constraints);
bool x86_match_immediate(x86_imm32_t *immediate, const ir_node *node,
char constraint);
......
ir/be/sparc/sparc_emitter.c
View file @ bd2375e2
......@@ -273,7 +273,7 @@ static bool emits_multiple_instructions(const ir_node *node)
return is_sparc_SMulh(node) || is_sparc_UMulh(node)
|| is_sparc_SDiv(node) || is_sparc_UDiv(node)
|| be_is_MemPerm(node) || be_is_Perm(node)
|| is_sparc_SubSP(node) || is_sparc_ASM(node);
|| is_sparc_SubSP(node) || be_is_Asm(node);
}
static bool uses_reg(const ir_node *node, unsigned reg_index, unsigned width)
......@@ -730,8 +730,8 @@ static void emit_sparc_asm_operand(ir_node const *const node, char const modifie
return;
}
sparc_asm_attr_t const *const attr = get_sparc_asm_attr_const(node);
sparc_asm_operand_t const *const op = &attr->operands[pos];
be_asm_attr_t const *const attr = get_be_asm_attr_const(node);
sparc_asm_operand_t const *const op = &((sparc_asm_operand_t const*)attr->operands)[pos];
switch (op->kind) {
case ASM_OPERAND_IMMEDIATE:
if (zero_as_g0 && op->immediate_value == 0 && !op->immediate_value_entity)
......@@ -761,8 +761,7 @@ static void emit_sparc_asm_operand(ir_node const *const node, char const modifie
static void emit_sparc_ASM(const ir_node *node)
{
sparc_asm_attr_t const *const attr = get_sparc_asm_attr_const(node);
be_emit_asm(node, attr->text, ARR_LEN(attr->operands), emit_sparc_asm_operand);
be_emit_asm(node, emit_sparc_asm_operand);
}
/**
......@@ -1333,12 +1332,12 @@ static void sparc_register_emitters(void)
sparc_register_spec_emitters();
/* custom emitter */
be_set_emitter(op_be_Asm, emit_sparc_ASM);
be_set_emitter(op_be_Copy, emit_be_Copy);
be_set_emitter(op_be_CopyKeep, emit_be_Copy);
be_set_emitter(op_be_IncSP, emit_be_IncSP);
be_set_emitter(op_be_MemPerm, emit_be_MemPerm);
be_set_emitter(op_be_Perm, emit_be_Perm);
be_set_emitter(op_sparc_ASM, emit_sparc_ASM);
be_set_emitter(op_sparc_Ba, emit_sparc_Ba);
be_set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
be_set_emitter(op_sparc_Call, emit_sparc_Call);
......
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