Commit be694a40 authored by Matthias Braun's avatar Matthias Braun
Browse files

ia32: remove support for negated symconsts

Assembler/linker never supported this anyway.
parent 016f70d0
......@@ -469,7 +469,6 @@ ir_node *ia32_turn_back_am(ir_node *node)
set_ia32_am_offs_int(node, 0);
set_ia32_am_sc(node, NULL);
set_ia32_am_scale(node, 0);
clear_ia32_am_sc_sign(node);
/* rewire mem-proj */
if (get_irn_mode(node) == mode_T) {
......
......@@ -25,9 +25,6 @@
#define AGGRESSIVE_AM
/* gas/ld don't support negative symconsts :-( */
#undef SUPPORT_NEGATIVE_SYMCONSTS
static bitset_t *non_address_mode_nodes;
/**
......@@ -58,11 +55,9 @@ static bool do_is_immediate(const ir_node *node, int *symconsts, bool negate)
return true;
case iro_SymConst:
/* the first SymConst of a DAG can be fold into an immediate */
#ifndef SUPPORT_NEGATIVE_SYMCONSTS
/* unfortunately the assembler/linker doesn't support -symconst */
if (negate)
return false;
#endif
if (get_SymConst_kind(node) != symconst_addr_ent)
return false;
if (++*symconsts > 1)
......@@ -140,10 +135,7 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, bool negate)
addr->symconst_ent = get_SymConst_entity(node);
if (get_entity_owner(addr->symconst_ent) == get_tls_type())
addr->tls_segment = true;
#ifndef SUPPORT_NEGATIVE_SYMCONSTS
assert(!negate);
#endif
addr->symconst_sign = negate;
break;
case iro_Unknown:
break;
......@@ -178,9 +170,9 @@ static void eat_immediate(ia32_address_t *addr, ir_node *node, bool negate)
static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node,
ia32_create_am_flags_t flags)
{
if (!(flags & ia32_create_am_force) &&
ia32_is_non_address_mode_node(node) &&
(!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2))
if (!(flags & ia32_create_am_force)
&& ia32_is_non_address_mode_node(node)
&& (!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2))
return node;
if (is_Add(node)) {
......@@ -213,63 +205,59 @@ static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node,
*
* @param addr the address mode data so far
* @param node the node to place
*
* @return non-zero on success
* @return true on success
*/
static int eat_shl(ia32_address_t *addr, ir_node *node)
static bool eat_shl(ia32_address_t *addr, ir_node *node)
{
ir_node *shifted_val;
long val;
if (is_Shl(node)) {
ir_node *right = get_Shl_right(node);
ir_tarval *tv;
/* we can use shl with 1, 2 or 3 shift */
ir_node *right = get_Shl_right(node);
if (!is_Const(right))
return 0;
tv = get_Const_tarval(right);
return false;
ir_tarval *tv = get_Const_tarval(right);
if (!tarval_is_long(tv))
return 0;
return false;
val = get_tarval_long(tv);
if (val < 0 || val > 3)
return 0;
if (val == 0) {
ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
}
return false;
if (val == 0)
ir_fprintf(stderr,
"Optimisation warning: unoptimized Shl(,0) found\n");
shifted_val = get_Shl_left(node);
} else if (is_Add(node)) {
/* might be an add x, x */
ir_node *left = get_Add_left(node);
ir_node *right = get_Add_right(node);
if (left != right)
return 0;
return false;
if (is_Const(left))
return 0;
return false;
val = 1;
shifted_val = left;
} else {
return 0;
return false;
}
/* we can only eat a shl if we don't have a scale or index set yet */
if (addr->scale != 0 || addr->index != NULL)
return 0;
return false;
if (ia32_is_non_address_mode_node(node))
return 0;
return false;
#ifndef AGGRESSIVE_AM
if (get_irn_n_edges(node) > 1)
return 0;
return false;
#endif
addr->scale = val;
addr->index = shifted_val;
return 1;
return true;
}
/* Create an address mode for a given node. */
......
......@@ -29,7 +29,6 @@ struct ia32_address_t {
bool use_frame; /**< Set, if the frame is accessed */
bool tls_segment; /**< Set if AM is relative to TLS */
ir_entity *frame_entity; /**< The accessed frame entity if any. */
bool symconst_sign; /**< The "sign" of the symconst. */
};
/**
......
......@@ -101,11 +101,12 @@ ir_entity *ia32_create_float_const_entity(ia32_isa_t *isa, ir_tarval *tv,
return res;
}
ir_node *ia32_create_Immediate(ir_graph *const irg, ir_entity *const symconst, int const symconst_sign, long const val)
ir_node *ia32_create_Immediate(ir_graph *const irg, ir_entity *const symconst,
long const val)
{
ir_node *start_block = get_irg_start_block(irg);
ir_node *immediate = new_bd_ia32_Immediate(NULL, start_block, symconst,
symconst_sign, ia32_no_pic_adjust, val);
ia32_no_pic_adjust, val);
arch_set_irn_register(immediate, &ia32_registers[REG_GP_NOREG]);
return immediate;
......@@ -653,7 +654,7 @@ ir_node *ia32_gen_CopyB(ir_node *node)
rem = size & 0x3; /* size % 4 */
size >>= 2;
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, size);
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, size);
ir_node *copyb = new_bd_ia32_CopyB(dbgi, block, new_dst, new_src, cnst,
new_mem, rem);
SET_IA32_ORIG_NODE(copyb, node);
......@@ -847,5 +848,5 @@ ir_node *ia32_try_create_Immediate(ir_node *node, char immediate_constraint_type
}
ir_graph *const irg = get_irn_irg(node);
return ia32_create_Immediate(irg, symconst_ent, 0, val);
return ia32_create_Immediate(irg, symconst_ent, val);
}
......@@ -32,10 +32,9 @@ ir_entity *ia32_create_float_const_entity(ia32_isa_t *isa, ir_tarval *tv,
*
* @param irg The IR graph the node belongs to.
* @param symconst if set, create a SymConst immediate
* @param symconst_sign sign for the symconst
* @param val integer value for the immediate
*/
ir_node *ia32_create_Immediate(ir_graph *irg, ir_entity *symconst, int symconst_sign, long val);
ir_node *ia32_create_Immediate(ir_graph *irg, ir_entity *symconst, long val);
/**
* returns register by name (used for determining clobber specifications in
......
......@@ -207,8 +207,6 @@ static void emit_ia32_Immediate_no_prefix(const ir_node *node)
const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
if (attr->symconst != NULL) {
if (attr->sc_sign)
be_emit_char('-');
ia32_emit_entity(attr->symconst, attr->no_pic_adjust);
}
if (attr->symconst == NULL || attr->offset != 0) {
......@@ -378,8 +376,6 @@ static void ia32_emit_am(ir_node const *const node)
/* emit offset */
if (ent != NULL) {
const ia32_attr_t *attr = get_ia32_attr_const(node);
if (is_ia32_am_sc_sign(node))
be_emit_char('-');
ia32_emit_entity(ent, attr->data.am_sc_no_pic_adjust);
}
......@@ -1816,8 +1812,7 @@ static void bemit32(const unsigned u32)
* Emit address of an entity. If @p is_relative is true then a relative
* offset from behind the address to the entity is created.
*/
static void bemit_entity(ir_entity *entity, bool entity_sign, int offset,
bool is_relative)
static void bemit_entity(ir_entity *entity, int offset, bool is_relative)
{
if (entity == NULL) {
bemit32(offset);
......@@ -1827,8 +1822,6 @@ static void bemit_entity(ir_entity *entity, bool entity_sign, int offset,
/* the final version should remember the position in the bytestream
and patch it with the correct address at linktime... */
be_emit_cstring("\t.long ");
if (entity_sign)
be_emit_char('-');
be_gas_emit_entity(entity);
if (get_entity_owner(entity) == get_tls_type()) {
......@@ -2006,7 +1999,7 @@ static void bemit_mod_am(unsigned reg, const ir_node *node)
if (emitoffs == 8) {
bemit8((unsigned) offs);
} else if (emitoffs == 32) {
bemit_entity(ent, is_ia32_am_sc_sign(node), offs, false);
bemit_entity(ent, offs, false);
}
}
......@@ -2048,7 +2041,7 @@ static void bemit_0f_unop_reg(ir_node const *const node, unsigned char const cod
static void bemit_immediate(const ir_node *node, bool relative)
{
const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
bemit_entity(attr->symconst, attr->sc_sign, attr->offset, relative);
bemit_entity(attr->symconst, attr->offset, relative);
}
static void bemit_copy(const ir_node *copy)
......@@ -2149,7 +2142,7 @@ static void bemit_binop(ir_node const *const node, unsigned const code)
switch (size) {
case 8: bemit8(attr->offset); break;
case 16: bemit16(attr->offset); break;
case 32: bemit_entity(attr->symconst, attr->sc_sign, attr->offset, false); break;
case 32: bemit_entity(attr->symconst, attr->offset, false); break;
}
} else {
bemit8(code << 3 | OP_MEM_SRC | op);
......@@ -2206,7 +2199,7 @@ static void bemit_binop_mem(ir_node const *const node, unsigned const code)
switch (size) {
case 8: bemit8(attr->offset); break;
case 16: bemit16(attr->offset); break;
case 32: bemit_entity(attr->symconst, attr->sc_sign, attr->offset, false); break;
case 32: bemit_entity(attr->symconst, attr->offset, false); break;
}
} else {
bemit8(code << 3 | op);
......@@ -2488,7 +2481,7 @@ static void bemit_test(ir_node const *const node)
switch (size) {
case 8: bemit8(attr->offset); break;
case 16: bemit16(attr->offset); break;
case 32: bemit_entity(attr->symconst, attr->sc_sign, attr->offset, false); break;
case 32: bemit_entity(attr->symconst, attr->offset, false); break;
}
} else {
bemit8(0x84 | op);
......@@ -2720,7 +2713,7 @@ static void bemit_load(const ir_node *node)
/* load from constant address to EAX can be encoded
as 0xA1 [offset] */
bemit8(0xA1);
bemit_entity(ent, 0, offs, false);
bemit_entity(ent, offs, false);
return;
}
}
......@@ -2771,7 +2764,7 @@ static void bemit_store(const ir_node *node)
bemit8(0x66);
bemit8(0xA3);
}
bemit_entity(ent, 0, offs, false);
bemit_entity(ent, offs, false);
return;
}
}
......
......@@ -177,7 +177,7 @@ static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
/* TODO: make the actual mode configurable in ChangeCW... */
or_const = new_bd_ia32_Immediate(NULL, get_irg_start_block(irg),
NULL, 0, 0, 3072);
NULL, 0, 3072);
arch_set_irn_register(or_const, &ia32_registers[REG_GP_NOREG]);
orn = new_bd_ia32_Or(NULL, block, noreg, noreg, nomem, load_res,
or_const);
......
......@@ -60,9 +60,6 @@ static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
fputc(' ', F);
if (attr->symconst) {
if (attr->sc_sign) {
fputc('-', F);
}
fputs(get_entity_name(attr->symconst), F);
}
if (attr->offset != 0 || attr->symconst == NULL) {
......@@ -82,9 +79,6 @@ static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
fputs(" [", F);
if (attr->am_sc != NULL) {
if (attr->data.am_sc_sign) {
fputc('-', F);
}
fputs(get_entity_name(attr->am_sc), F);
if (attr->data.am_sc_no_pic_adjust) {
fputs("(no_pic_adjust)", F);
......@@ -417,33 +411,6 @@ void set_ia32_am_sc(ir_node *node, ir_entity *entity)
attr->am_sc = entity;
}
/**
* Sets the sign bit for address mode symconst.
*/
void set_ia32_am_sc_sign(ir_node *node)
{
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.am_sc_sign = 1;
}
/**
* Clears the sign bit for address mode symconst.
*/
void clear_ia32_am_sc_sign(ir_node *node)
{
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.am_sc_sign = 0;
}
/**
* Returns the sign bit for address mode symconst.
*/
int is_ia32_am_sc_sign(const ir_node *node)
{
const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_sc_sign;
}
void set_ia32_am_tls_segment(ir_node *node, bool value)
{
ia32_attr_t *attr = get_ia32_attr(node);
......@@ -480,8 +447,6 @@ void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
set_ia32_ls_mode(to, get_ia32_ls_mode(from));
set_ia32_am_scale(to, get_ia32_am_scale(from));
set_ia32_am_sc(to, get_ia32_am_sc(from));
if (is_ia32_am_sc_sign(from))
set_ia32_am_sc_sign(to);
add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
set_ia32_frame_ent(to, get_ia32_frame_ent(from));
if (is_ia32_use_frame(from))
......@@ -799,8 +764,7 @@ static void init_ia32_asm_attributes(ir_node *res)
}
static void init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
int symconst_sign, int no_pic_adjust,
long offset)
int no_pic_adjust, long offset)
{
ia32_immediate_attr_t *attr = (ia32_immediate_attr_t*)get_irn_generic_attr(res);
......@@ -808,7 +772,6 @@ static void init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
#endif
attr->symconst = symconst;
attr->sc_sign = symconst_sign;
attr->no_pic_adjust = no_pic_adjust;
attr->offset = offset;
}
......@@ -877,7 +840,6 @@ static int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b)
return 1;
if (a->data.am_scale != b->data.am_scale
|| a->data.am_sc_sign != b->data.am_sc_sign
|| a->am_offs != b->am_offs
|| a->am_sc != b->am_sc
|| a->data.am_sc_no_pic_adjust != b->data.am_sc_no_pic_adjust
......@@ -996,7 +958,7 @@ static unsigned ia32_hash_Immediate(const ir_node *irn)
{
const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
return hash_ptr(a->symconst) + (a->sc_sign << 16) + a->offset;
return hash_ptr(a->symconst) + a->offset;
}
/** Compare node attributes for Immediates. */
......@@ -1006,7 +968,6 @@ static int ia32_compare_immediate_attr(const ir_node *a, const ir_node *b)
const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
if (attr_a->symconst != attr_b->symconst
|| attr_a->sc_sign != attr_b->sc_sign
|| attr_a->no_pic_adjust != attr_b->no_pic_adjust
|| attr_a->offset != attr_b->offset) {
return 1;
......
......@@ -119,21 +119,6 @@ ir_entity *get_ia32_am_sc(const ir_node *node);
*/
void set_ia32_am_sc(ir_node *node, ir_entity *sc);
/**
* Sets the sign bit for address mode symconst.
*/
void set_ia32_am_sc_sign(ir_node *node);
/**
* Clears the sign bit for address mode symconst.
*/
void clear_ia32_am_sc_sign(ir_node *node);
/**
* Returns the sign bit for address mode symconst.
*/
int is_ia32_am_sc_sign(const ir_node *node);
void set_ia32_am_tls_segment(ir_node *node, bool value);
bool get_ia32_am_tls_segment(const ir_node *node);
......
......@@ -84,7 +84,6 @@ struct ia32_attr_t {
unsigned tp:3; /**< ia32 node type. */
unsigned am_arity:2; /**< Indicates the address mode type supported by this node. */
unsigned am_scale:2; /**< The address mode scale for index register. */
unsigned am_sc_sign:1; /**< The sign bit of the address mode symconst. */
unsigned am_sc_no_pic_adjust : 1;/**< AM symconst can be relative to EIP */
unsigned am_tls_segment:1; /**< addresses are relative to TLS */
......@@ -165,7 +164,6 @@ struct ia32_immediate_attr_t {
ia32_attr_t attr; /**< generic attribute */
ir_entity *symconst; /**< An entity if any. */
long offset; /**< An offset if any. */
unsigned sc_sign : 1; /**< The sign bit of the symconst. */
unsigned no_pic_adjust : 1; /**< constant can be relative to EIP */
};
......
......@@ -284,15 +284,15 @@ static void peephole_ia32_Test(ir_node *node)
if ((offset & 0xFFFFFF00) == 0) {
/* attr->am_offs += 0; */
} else if ((offset & 0xFFFF00FF) == 0) {
ir_node *imm_node = ia32_create_Immediate(irg, NULL, 0, offset >> 8);
ir_node *imm_node = ia32_create_Immediate(irg, NULL, offset >> 8);
set_irn_n(node, n_ia32_Test_right, imm_node);
attr->am_offs += 1;
} else if ((offset & 0xFF00FFFF) == 0) {
ir_node *imm_node = ia32_create_Immediate(irg, NULL, 0, offset >> 16);
ir_node *imm_node = ia32_create_Immediate(irg, NULL, offset >> 16);
set_irn_n(node, n_ia32_Test_right, imm_node);
attr->am_offs += 2;
} else if ((offset & 0x00FFFFFF) == 0) {
ir_node *imm_node = ia32_create_Immediate(irg, NULL, 0, offset >> 24);
ir_node *imm_node = ia32_create_Immediate(irg, NULL, offset >> 24);
set_irn_n(node, n_ia32_Test_right, imm_node);
attr->am_offs += 3;
} else {
......@@ -811,7 +811,7 @@ ir_node *ia32_immediate_from_long(long val)
ir_graph *irg = current_ir_graph;
ir_node *start_block = get_irg_start_block(irg);
ir_node *immediate
= new_bd_ia32_Immediate(NULL, start_block, NULL, 0, 0, val);
= new_bd_ia32_Immediate(NULL, start_block, NULL, 0, val);
arch_set_irn_register(immediate, &ia32_registers[REG_GP_NOREG]);
return immediate;
......@@ -821,14 +821,12 @@ static ir_node *create_immediate_from_am(const ir_node *node)
{
ir_node *block = get_nodes_block(node);
int offset = get_ia32_am_offs_int(node);
int sc_sign = is_ia32_am_sc_sign(node);
const ia32_attr_t *attr = get_ia32_attr_const(node);
int sc_no_pic_adjust = attr->data.am_sc_no_pic_adjust;
ir_entity *entity = get_ia32_am_sc(node);
ir_node *res;
res = new_bd_ia32_Immediate(NULL, block, entity, sc_sign, sc_no_pic_adjust,
offset);
res = new_bd_ia32_Immediate(NULL, block, entity, sc_no_pic_adjust, offset);
arch_set_irn_register(res, &ia32_registers[REG_GP_NOREG]);
return res;
}
......
......@@ -121,7 +121,7 @@ $custom_init_attr_func = \&ia32_custom_init_attr;
"\tinit_ia32_copyb_attributes(res, size);",
ia32_immediate_attr_t =>
"\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, no_pic_adjust, offset);",
"\tinit_ia32_immediate_attributes(res, symconst, no_pic_adjust, offset);",
ia32_x87_attr_t =>
"\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_x87_attributes(res);",
......@@ -170,7 +170,7 @@ Immediate => {
op_flags => [ "constlike" ],
irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "gp_NOREG:I" ] },
attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
attr => "ir_entity *symconst, int no_pic_adjust, long offset",
attr_type => "ia32_immediate_attr_t",
hash_func => "ia32_hash_Immediate",
latency => 0,
......@@ -882,7 +882,7 @@ Const => {
irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
emit => "movl %I, %D0",
attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
attr => "ir_entity *symconst, int no_pic_adjust, long offset",
attr_type => "ia32_immediate_attr_t",
latency => 1,
mode => $mode_gp,
......
......@@ -236,7 +236,7 @@ static ir_node *gen_Const(ir_node *node)
(get_tarval_sub_bits(tv, 1) << 8) |
(get_tarval_sub_bits(tv, 2) << 16) |
(get_tarval_sub_bits(tv, 3) << 24);
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, val);
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, val);
load = new_bd_ia32_xMovd(dbgi, block, cnst);
set_ia32_ls_mode(load, mode);
res = load;
......@@ -313,7 +313,7 @@ end:
}
long val = get_tarval_long(tv);
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, val);
ir_node *cnst = new_bd_ia32_Const(dbgi, block, NULL, 0, val);
SET_IA32_ORIG_NODE(cnst, node);
return cnst;
......@@ -343,7 +343,7 @@ static ir_node *gen_SymConst(ir_node *node)
set_ia32_am_sc(lea, entity);
cnst = lea;
} else {
cnst = new_bd_ia32_Const(dbgi, block, entity, 0, 0, 0);
cnst = new_bd_ia32_Const(dbgi, block, entity, 0, 0);
}
SET_IA32_ORIG_NODE(cnst, node);
return cnst;
......@@ -587,8 +587,6 @@ static void set_address(ir_node *node, const ia32_address_t *addr)
set_ia32_am_sc(node, addr->symconst_ent);
set_ia32_am_offs_int(node, addr->offset);
set_ia32_am_tls_segment(node, addr->tls_segment);
if (addr->symconst_sign)
set_ia32_am_sc_sign(node);
if (addr->use_frame)
set_ia32_use_frame(node);
set_ia32_frame_ent(node, addr->frame_entity);
......@@ -1380,7 +1378,7 @@ static ir_node *gen_Add(ir_node *node)
/* a constant? */
if (addr.base == NULL && addr.index == NULL) {
new_node = new_bd_ia32_Const(dbgi, new_block, addr.symconst_ent,
addr.symconst_sign, 0, addr.offset);
0, addr.offset);
SET_IA32_ORIG_NODE(new_node, node);
return new_node;
}
......@@ -1651,7 +1649,7 @@ static ir_node *create_sex_32_64(dbg_info *dbgi, ir_node *block,
res = new_bd_ia32_Cltd(dbgi, block, val, pval);
} else {
ir_graph *const irg = get_Block_irg(block);
ir_node *const imm31 = ia32_create_Immediate(irg, NULL, 0, 31);
ir_node *const imm31 = ia32_create_Immediate(irg, NULL, 31);
res = new_bd_ia32_Sar(dbgi, block, val, imm31);
}
SET_IA32_ORIG_NODE(res, orig);
......@@ -1707,7 +1705,7 @@ static ir_node *create_Div(ir_node *node)
am.new_op1, sign_extension);
} else {
ir_node *sign_extension
= new_bd_ia32_Const(dbgi, new_block, NULL, 0, 0, 0);
= new_bd_ia32_Const(dbgi, new_block, NULL, 0, 0);
new_node = new_bd_ia32_Div(dbgi, new_block, addr->base,
addr->index, new_mem, am.new_op2,
am.new_op1, sign_extension);
......@@ -2584,7 +2582,7 @@ static ir_node *gen_float_const_Store(ir_node *node, ir_node *cns)
panic("invalid size of Store float to mem (%+F)", node);
}
ir_graph *const irg = get_Block_irg(new_block);
ir_node *const imm = ia32_create_Immediate(irg, NULL, 0, val);
ir_node *const imm = ia32_create_Immediate(irg, NULL, val);
ir_node *new_node = new_bd_ia32_Store(dbgi, new_block, addr.base,
addr.index, addr.mem, imm);
......@@ -3319,7 +3317,6 @@ static ir_node *gen_Mux(ir_node *node)
am.addr.use_frame = 0;
am.addr.tls_segment = false;
am.addr.frame_entity = NULL;
am.addr.symconst_sign = 0;
am.mem_proj = am.addr.mem;
am.op_type = ia32_AddrModeS;
am.new_op1 = NULL;
......@@ -3589,7 +3586,7 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode)
if (!mode_is_signed(mode)) {
ir_node *in[2];
/* store a zero */
ir_node *zero_const = ia32_create_Immediate(irg, NULL, 0, 0);
ir_node *zero_const = ia32_create_Immediate(irg, NULL, 0);
ir_node *zero_store = new_bd_ia32_Store(dbgi, block, frame, noreg_GP,
nomem, zero_const);
......@@ -4091,7 +4088,7 @@ static ir_node *gen_ia32_l_LLtoFloat(ir_node *node)
ir_node *res = new_r_Proj(fild, mode_fp, pn_ia32_fild_res);
if (!mode_is_signed(get_irn_mode(val_high))) {
ir_node *count = ia32_create_Immediate(irg, NULL, 0, 31);
ir_node *count = ia32_create_Immediate(irg, NULL, 31);
ia32_address_mode_t am;
am.addr.base = get_symconst_base();
......@@ -4103,7 +4100,6 @@ static ir_node *gen_ia32_l_LLtoFloat(ir_node *node)
am.addr.tls_segment = false;
am.addr.use_frame = 0;
am.addr.frame_entity = NULL;
am.addr.symconst_sign = 0;
am.ls_mode = mode_F;
am.mem_proj = nomem;
am.op_type = ia32_AddrModeS;
......@@ -4792,7 +4788,7 @@ static ir_node *gen_clz(ir_node *node)
dbg_info *dbgi = get_irn_dbg_info(real);
ir_node *block = get_nodes_block(real);