Commit bf4b3419 authored by Matthias Braun's avatar Matthias Braun
Browse files

amd64: remodel a bunch of node attributes

parent 9a169e46
......@@ -182,7 +182,7 @@ typedef enum amd64_emit_mod_t {
} amd64_emit_mod_t;
ENUM_BITSET(amd64_emit_mod_t)
static void amd64_emit_immediate(const amd64_imm_t *const imm)
static void amd64_emit_immediate(const amd64_movimm_attr_t *const imm)
{
if (imm->symconst != NULL) {
be_gas_emit_entity(imm->symconst);
......@@ -196,17 +196,6 @@ static void amd64_emit_immediate(const amd64_imm_t *const imm)
}
}
static void amd64_emit_am_old(const arch_register_t *const base,
const amd64_imm_t *const imm)
{
if (base == NULL) {
amd64_emit_immediate(imm);
return;
}
emit_register(base);
}
static void amd64_emit_am(const ir_node *const node,
const amd64_am_info_t *const am)
{
......@@ -307,13 +296,7 @@ end_of_mods:
switch (*fmt++) {
case 'M': {
amd64_attr_t const *const attr = get_amd64_attr_const(node);
if (mod & EMIT_RESPECT_LS) {
arch_register_t const *const base
= arch_get_irn_register_in(node, 0);
amd64_emit_am_old(base, &attr->imm);
} else {
amd64_emit_am(node, &attr->am);
}
amd64_emit_am(node, &attr->am);
break;
}
default:
......@@ -322,8 +305,9 @@ end_of_mods:
break;
case 'C': {
amd64_attr_t const *const attr = get_amd64_attr_const(node);
amd64_emit_immediate(&attr->imm);
amd64_movimm_attr_t const *const attr
= get_amd64_movimm_attr_const(node);
amd64_emit_immediate(attr);
break;
}
......@@ -345,13 +329,6 @@ end_of_mods:
break;
}
case 'O': {
amd64_SymConst_attr_t const *const attr = get_amd64_SymConst_attr_const(node);
if (attr->fp_offset)
be_emit_irprintf("%d", attr->fp_offset);
break;
}
case 'R':
reg = va_arg(ap, arch_register_t const*);
emit_R:
......@@ -469,18 +446,14 @@ static void emit_amd64_SwitchJmp(const ir_node *node)
*/
static void emit_amd64_Jcc(const ir_node *irn)
{
const ir_node *proj_true = NULL;
const ir_node *proj_false = NULL;
const ir_node *block;
const ir_node *next_block;
const char *suffix;
const amd64_attr_t *attr = get_amd64_attr_const(irn);
ir_relation relation = attr->ext.relation;
ir_node *op1 = get_irn_n(irn, 0);
const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1);
bool is_signed = !cmp_attr->data.cmp_unsigned;
assert(is_amd64_Cmp(op1));
const ir_node *proj_true = NULL;
const ir_node *proj_false = NULL;
const ir_node *block;
const ir_node *next_block;
const char *suffix;
const amd64_cc_attr_t *attr = get_amd64_cc_attr_const(irn);
ir_relation relation = attr->relation;
bool is_signed = !attr->is_unsigned;
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
......@@ -492,10 +465,6 @@ static void emit_amd64_Jcc(const ir_node *irn)
}
}
if (cmp_attr->data.ins_permuted) {
relation = get_inversed_relation(relation);
}
/* for now, the code works for scheduled and non-schedules blocks */
block = get_nodes_block(irn);
......@@ -595,15 +564,6 @@ static void emit_be_Perm(const ir_node *node)
}
}
static void emit_amd64_FrameAddr(const ir_node *irn)
{
const amd64_SymConst_attr_t *attr =
(const amd64_SymConst_attr_t*) get_amd64_attr_const(irn);
amd64_emitf(irn, "mov %S0, %D0");
amd64_emitf(irn, "add $%u, %D0", attr->fp_offset);
}
/**
* Emits code to increase stack pointer.
*/
......@@ -659,7 +619,6 @@ static void amd64_register_emitters(void)
amd64_register_spec_emitters();
be_set_emitter(op_amd64_Call, emit_amd64_Call);
be_set_emitter(op_amd64_FrameAddr, emit_amd64_FrameAddr);
be_set_emitter(op_amd64_Jcc, emit_amd64_Jcc);
be_set_emitter(op_amd64_Jmp, emit_amd64_Jmp);
be_set_emitter(op_amd64_LoadZ, emit_amd64_LoadZ);
......
......@@ -84,20 +84,6 @@ amd64_attr_t *get_amd64_attr(ir_node *node)
return (amd64_attr_t *)get_irn_generic_attr(node);
}
const amd64_SymConst_attr_t *get_amd64_SymConst_attr_const(const ir_node *node)
{
const amd64_SymConst_attr_t *attr
= (const amd64_SymConst_attr_t*)get_irn_generic_attr_const(node);
return attr;
}
amd64_SymConst_attr_t *get_amd64_SymConst_attr(ir_node *node)
{
amd64_SymConst_attr_t *attr
= (amd64_SymConst_attr_t*)get_irn_generic_attr(node);
return attr;
}
const amd64_switch_jmp_attr_t *get_amd64_switch_jmp_attr_const(const ir_node *node)
{
const amd64_switch_jmp_attr_t *attr
......@@ -112,38 +98,44 @@ amd64_switch_jmp_attr_t *get_amd64_switch_jmp_attr(ir_node *node)
return attr;
}
/**
* Initializes the nodes attributes.
*/
static void init_amd64_attributes(ir_node *node, arch_irn_flags_t flags,
const arch_register_req_t **in_reqs,
int n_res)
const amd64_movimm_attr_t *get_amd64_movimm_attr_const(const ir_node *node)
{
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
amd64_attr_t *attr = get_amd64_attr(node);
backend_info_t *info;
assert(is_amd64_irn(node));
return (const amd64_movimm_attr_t*)get_irn_generic_attr_const(node);
}
arch_set_irn_flags(node, flags);
arch_set_irn_register_reqs_in(node, in_reqs);
amd64_movimm_attr_t *get_amd64_movimm_attr(ir_node *node)
{
assert(is_amd64_irn(node));
return (amd64_movimm_attr_t*)get_irn_generic_attr(node);
}
info = be_get_info(node);
info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, n_res);
const amd64_cc_attr_t *get_amd64_cc_attr_const(const ir_node *node)
{
assert(is_amd64_irn(node));
return (const amd64_cc_attr_t*)get_irn_generic_attr_const(node);
}
attr->data.ins_permuted = 0;
attr->data.cmp_unsigned = 0;
attr->ext.relation = ir_relation_false;
amd64_cc_attr_t *get_amd64_cc_attr(ir_node *node)
{
assert(is_amd64_irn(node));
return (amd64_cc_attr_t*)get_irn_generic_attr(node);
}
/**
* Initialize SymConst attributes.
* Initializes the nodes attributes.
*/
static void init_amd64_SymConst_attributes(ir_node *node, ir_entity *entity)
static void init_amd64_attributes(ir_node *node, arch_irn_flags_t flags,
const arch_register_req_t **in_reqs,
int n_res)
{
amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr(node);
attr->entity = entity;
attr->fp_offset = 0;
arch_set_irn_flags(node, flags);
arch_set_irn_register_reqs_in(node, in_reqs);
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
backend_info_t *info = be_get_info(node);
info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, n_res);
}
/**
......@@ -163,22 +155,20 @@ static void init_amd64_switch_attributes(ir_node *node, const ir_switch_table *t
}
}
/** Compare node attributes for SymConst. */
static int cmp_amd64_attr_SymConst(const ir_node *a, const ir_node *b)
static void init_amd64_cc_attributes(ir_node *node, ir_relation relation,
bool is_unsigned)
{
const amd64_SymConst_attr_t *attr_a = get_amd64_SymConst_attr_const(a);
const amd64_SymConst_attr_t *attr_b = get_amd64_SymConst_attr_const(b);
if (attr_a->entity != attr_b->entity
|| attr_a->fp_offset != attr_b->fp_offset)
return 1;
return 0;
amd64_cc_attr_t *attr = get_amd64_cc_attr(node);
attr->relation = relation;
attr->is_unsigned = is_unsigned;
}
static int cmp_imm(const amd64_imm_t *const imm0, const amd64_imm_t *const imm1)
static void init_amd64_movimm_attributes(ir_node *node, ir_entity *symconst,
int64_t offset)
{
return imm0->offset != imm1->offset || imm0->symconst != imm1->symconst;
amd64_movimm_attr_t *attr = get_amd64_movimm_attr(node);
attr->symconst = symconst;
attr->offset = offset;
}
static int cmp_am(const amd64_am_info_t *const am0,
......@@ -187,7 +177,6 @@ static int cmp_am(const amd64_am_info_t *const am0,
return am0->offset != am1->offset || am0->symconst != am1->symconst
|| am0->base_input != am1->base_input
|| am0->index_input != am1->index_input
|| am0->mem_input != am1->mem_input
|| am0->log_scale != am1->log_scale
|| am0->segment != am1->segment;
}
......@@ -197,13 +186,49 @@ static int cmp_amd64_attr(const ir_node *a, const ir_node *b)
{
const amd64_attr_t *attr_a = get_amd64_attr_const(a);
const amd64_attr_t *attr_b = get_amd64_attr_const(b);
return cmp_imm(&attr_a->imm, &attr_b->imm)
|| cmp_am(&attr_a->am, &attr_b->am);
return cmp_am(&attr_a->am, &attr_b->am)
|| attr_a->data.insn_mode != attr_b->data.insn_mode
|| attr_a->data.needs_frame_ent != attr_b->data.needs_frame_ent
|| attr_a->ls_mode != attr_b->ls_mode;
}
static int cmp_amd64_movimm_attr(const ir_node *const a,
const ir_node *const b)
{
if (cmp_amd64_attr(a, b))
return true;
const amd64_movimm_attr_t *const attr_a = get_amd64_movimm_attr_const(a);
const amd64_movimm_attr_t *const attr_b = get_amd64_movimm_attr_const(b);
return attr_a->symconst != attr_b->symconst
|| attr_a->offset != attr_b->offset;
}
static int cmp_amd64_cc_attr(const ir_node *const a,
const ir_node *const b)
{
if (cmp_amd64_attr(a, b))
return true;
const amd64_cc_attr_t *const attr_a = get_amd64_cc_attr_const(a);
const amd64_cc_attr_t *const attr_b = get_amd64_cc_attr_const(b);
return attr_a->relation != attr_b->relation
|| attr_a->is_unsigned != attr_b->is_unsigned;
}
static int cmp_amd64_switch_jmp_attr(const ir_node *const a,
const ir_node *const b)
{
if (cmp_amd64_attr(a, b))
return true;
const amd64_switch_jmp_attr_t *const attr_a
= get_amd64_switch_jmp_attr_const(a);
const amd64_switch_jmp_attr_t *const attr_b
= get_amd64_switch_jmp_attr_const(b);
return attr_a->table != attr_b->table;
}
/** copies the AMD64 attributes of a node. */
static void amd64_copy_attr(ir_graph *irg, const ir_node *old_node,
ir_node *new_node)
ir_node *new_node)
{
struct obstack *obst = get_irg_obstack(irg);
const amd64_attr_t *attr_old = get_amd64_attr_const(old_node);
......
......@@ -24,12 +24,15 @@ void set_amd64_ls_mode(ir_node *n, ir_mode *mode);
amd64_attr_t *get_amd64_attr(ir_node *node);
const amd64_attr_t *get_amd64_attr_const(const ir_node *node);
const amd64_SymConst_attr_t *get_amd64_SymConst_attr_const(const ir_node *node);
amd64_SymConst_attr_t *get_amd64_SymConst_attr(ir_node *node);
const amd64_switch_jmp_attr_t *get_amd64_switch_jmp_attr_const(const ir_node *node);
amd64_switch_jmp_attr_t *get_amd64_switch_jmp_attr(ir_node *node);
const amd64_cc_attr_t *get_amd64_cc_attr_const(const ir_node *node);
amd64_cc_attr_t *get_amd64_cc_attr(ir_node *node);
const amd64_movimm_attr_t *get_amd64_movimm_attr_const(const ir_node *node);
amd64_movimm_attr_t *get_amd64_movimm_attr(ir_node *node);
/* Include the generated headers */
#include "gen_amd64_new_nodes.h"
......
......@@ -16,8 +16,9 @@
#include "compiler.h"
typedef struct amd64_attr_t amd64_attr_t;
typedef struct amd64_SymConst_attr_t amd64_SymConst_attr_t;
typedef struct amd64_switch_jmp_attr_t amd64_switch_jmp_attr_t;
typedef struct amd64_movimm_attr_t amd64_movimm_attr_t;
typedef struct amd64_cc_attr_t amd64_cc_attr_t;
typedef enum {
INSN_MODE_64,
......@@ -36,11 +37,6 @@ typedef enum {
AMD64_SEGMENT_GS,
} amd64_segment_selector_t;
typedef struct amd64_imm_t {
int64_t offset;
ir_entity *symconst;
} amd64_imm_t;
enum {
NO_INPUT = 0xFF,
RIP_INPUT = 0xFE, /* can be used as base_input for PIC code */
......@@ -51,7 +47,6 @@ typedef struct amd64_am_info_t {
ir_entity *symconst;
uint8_t base_input;
uint8_t index_input;
uint8_t mem_input;
unsigned log_scale : 2; /* 0, 1, 2, 3 (giving scale 1, 2, 4, 8) */
ENUMBF(amd64_segment_selector_t) segment : 4;
} amd64_am_info_t;
......@@ -61,24 +56,24 @@ struct amd64_attr_t
except_attr exc; /**< the exception attribute. MUST be the first one. */
ir_mode *ls_mode; /**< Stores the "input" mode */
struct amd64_attr_data_bitfield {
unsigned ins_permuted : 1; /**< inputs of node have been permuted
(for commutative nodes) */
unsigned cmp_unsigned : 1; /**< compare should be unsigned */
bool has_am_info : 1;
bool needs_frame_ent : 1;
ENUMBF(amd64_insn_mode_t) insn_mode : 2;
} data;
struct amd64_attr_extended {
ir_relation relation; /**< type of compare operation >*/
} ext;
amd64_imm_t imm;
amd64_am_info_t am;
};
struct amd64_SymConst_attr_t
struct amd64_movimm_attr_t
{
amd64_attr_t base;
ir_entity *entity;
unsigned fp_offset;
amd64_attr_t base;
int64_t offset;
ir_entity *symconst;
};
struct amd64_cc_attr_t
{
ir_relation relation;
bool is_unsigned : 1;
};
struct amd64_switch_jmp_attr_t
......@@ -88,7 +83,4 @@ struct amd64_switch_jmp_attr_t
ir_entity *table_entity;
};
#define CAST_AMD64_ATTR(type,ptr) ((type *)(ptr))
#define CONST_CAST_AMD64_ATTR(type,ptr) ((const type *)(ptr))
#endif
......@@ -47,45 +47,51 @@ $default_copy_attr = "amd64_copy_attr";
%init_attr = (
amd64_attr_t =>
"\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);",
amd64_SymConst_attr_t =>
"\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);"
. "\tinit_amd64_SymConst_attributes(res, entity);",
amd64_switch_jmp_attr_t =>
"\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);"
. "\tinit_amd64_switch_attributes(res, table, table_entity);"
. "\tinit_amd64_switch_attributes(res, table, table_entity);",
amd64_cc_attr_t =>
"\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);"
. "\tinit_amd64_cc_attributes(res, relation, is_unsigned);",
amd64_movimm_attr_t =>
"\tinit_amd64_attributes(res, irn_flags_, in_reqs, n_res);"
. "\tinit_amd64_movimm_attributes(res, symconst, offset);",
);
%compare_attr = (
amd64_attr_t => "cmp_amd64_attr",
amd64_SymConst_attr_t => "cmp_amd64_attr_SymConst",
amd64_switch_jmp_attr_t => "cmp_amd64_attr",
amd64_attr_t => "cmp_amd64_attr",
amd64_switch_jmp_attr_t => "cmp_amd64_switch_jmp_attr",
amd64_movimm_attr_t => "cmp_amd64_movimm_attr",
amd64_cc_attr_t => "cmp_amd64_cc_attr",
);
%nodes = (
PushAM => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "none", "rsp" ], out => [ "rsp:I|S", "none" ] },
ins => [ "base", "mem", "stack" ],
reg_req => { out => [ "rsp:I|S", "none" ] },
arity => "variable",
outs => [ "stack", "M" ],
attr => "amd64_insn_mode_t insn_mode, int64_t offset, ir_entity *symconst",
init_attr => "attr->imm.offset = offset;\n"
. "attr->imm.symconst = symconst;\n"
. "attr->data.insn_mode = insn_mode;\n",
emit => "push %AM",
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
attr_type => "amd64_attr_t",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
emit => "push%M %AM",
},
PopAM => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "none", "rsp" ], out => [ "rsp:I|S", "none" ] },
ins => [ "base", "mem", "stack" ],
reg_req => { out => [ "rsp:I|S", "none" ] },
arity => "variable",
outs => [ "stack", "M" ],
attr => "amd64_insn_mode_t insn_mode, int64_t offset, ir_entity *symconst",
init_attr => "attr->imm.offset = offset;\n"
. "attr->imm.symconst = symconst;\n"
. "attr->data.insn_mode = insn_mode;\n",
emit => "pop %AM",
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
attr_type => "amd64_attr_t",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
emit => "pop%M %AM",
},
Add => {
......@@ -266,9 +272,8 @@ Xor0 => {
Const => {
op_flags => [ "constlike" ],
attr => "amd64_insn_mode_t insn_mode, int64_t offset, ir_entity *symconst",
init_attr => "attr->imm.offset = offset;\n"
. "attr->imm.symconst = symconst;\n"
. "attr->data.insn_mode = insn_mode;\n",
init_attr => "attr->base.data.insn_mode = insn_mode;\n",
attr_type => "amd64_movimm_attr_t",
reg_req => { out => [ "gp" ] },
emit => 'mov%M $%C, %D0',
mode => $mode_gp,
......@@ -300,10 +305,8 @@ Cmp => {
ins => [ "left", "right" ],
outs => [ "eflags" ],
emit => "cmp%M %S1, %S0",
attr => "amd64_insn_mode_t insn_mode, int ins_permuted, int cmp_unsigned",
init_attr => "attr->data.ins_permuted = ins_permuted;\n".
"\tattr->data.cmp_unsigned = cmp_unsigned;\n".
"\tattr->data.insn_mode = insn_mode;\n",
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;\n",
mode => $mode_flags,
modified_flags => 1,
},
......@@ -314,8 +317,9 @@ Lea => {
outs => [ "res", "flags", "M" ],
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
reg_req => { out => [ "gp", "flags", "none" ] },
init_attr => "attr->data.insn_mode = insn_mode;\n".
"\tattr->am = am;\n",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
emit => "lea%M %AM, %D0",
mode => $mode_gp,
},
......@@ -326,8 +330,8 @@ Jcc => {
reg_req => { in => [ "eflags" ], out => [ "none", "none" ] },
ins => [ "eflags" ],
outs => [ "false", "true" ],
attr => "ir_relation relation",
init_attr => "attr->ext.relation = relation;",
attr => "ir_relation relation, bool is_unsigned",
attr_type => "amd64_cc_attr_t",
mode => "mode_T",
},
......@@ -340,7 +344,8 @@ LoadZ => {
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
attr_type => "amd64_attr_t",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n",
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
},
LoadS => {
......@@ -352,20 +357,11 @@ LoadS => {
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
attr_type => "amd64_attr_t",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n",
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
emit => "movs%Mq %AM, %^D0"
},
FrameAddr => {
op_flags => [ "constlike" ],
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "gp" ] },
ins => [ "base" ],
attr => "ir_entity *entity",
attr_type => "amd64_SymConst_attr_t",
mode => $mode_gp,
},
Store => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
......@@ -375,7 +371,8 @@ Store => {
attr => "amd64_insn_mode_t insn_mode, amd64_am_info_t am",
attr_type => "amd64_attr_t",
init_attr => "attr->data.insn_mode = insn_mode;\n"
."\tattr->am = am;\n",
."\tattr->am = am;\n"
."\tattr->data.has_am_info = true;\n",
mode => "mode_M",
emit => "mov%M %S0, %AM"
},
......
......@@ -74,6 +74,10 @@ static const arch_register_req_t *am_store_base_reqs[] = {
&arch_no_requirement,
};
static const arch_register_req_t *am_lea_base_reqs[] = {
&amd64_requirement_gp,
};
static inline int mode_needs_gp_reg(ir_mode *mode)
{
return mode_is_int(mode) || mode_is_reference(mode);
......@@ -161,7 +165,7 @@ static ir_node *gen_SymConst(ir_node *node)
amd64_am_info_t am;
memset(&am, 0, sizeof(am));
am.base_input = RIP_INPUT;
am.base_input = RIP_INPUT;
am.index_input = NO_INPUT;
if (mode == REFERENCE_IP_RELATIVE) {
am.symconst = entity;
......@@ -334,8 +338,16 @@ static ir_node *gen_Sel(ir_node *const node)
panic("Sel not lowered");
if (get_Sel_n_indexs(node) > 0)
panic("array Sel not lowered %+F", node);
ir_entity *entity = get_Sel_entity(node);
return new_bd_amd64_FrameAddr(dbgi, new_block, base, entity);
amd64_am_info_t am;
memset(&am, 0, sizeof(am));
am.base_input = 0;
am.index_input = NO_INPUT;
am.symconst = get_Sel_entity(node);
ir_node *in[] = { base };
ir_node *res = new_bd_amd64_Lea(dbgi, new_block, ARRAY_SIZE(in), in,
INSN_MODE_64, am);
arch_set_irn_register_reqs_in(res, am_lea_base_reqs);
return res;
}
static ir_node *gen_Jmp(ir_node *node)
......@@ -781,10 +793,10 @@ static ir_node *gen_Proj_Proj_Start(ir_node *node)
/* TODO: use the AM form for the address calculation */
amd64_am_info_t am;
memset(&am, 0, sizeof(am));
am.base_input = 0;
am.mem_input = 1;
am.symconst = param->entity;
ir_node *in[] = { base, mem };
am.base_input = 0;
am.index_input = NO_INPUT;
am.symconst = param->entity;
ir_node *in[] = { base, mem };
ir_node *load;
ir_node *value;
if (get_mode_size_bits(mode) < 64 && mode_is_signed(mode)) {
......@@ -829,9 +841,6 @@ static ir_node *gen_Cmp(ir_node *node)