Commit c2ab1a48 authored by Matthias Braun's avatar Matthias Braun
Browse files

amd64: fix missing insn_mode

parent 542ebc2e
......@@ -78,27 +78,16 @@ static void transform_sub_to_neg_add(ir_node *node,
ir_node *add, *add_res;
if (is_amd64_xSubs(node)) {
ir_mode *mode = get_irn_mode(in2);
ir_tarval *tv;
if (get_mode_size_bits(mode) <= 32)
tv = create_sign_tv(mode_Iu);
else
tv = create_sign_tv(mode_Lu);
ir_tarval *tv = create_sign_tv(amd64_mode_xmm);
ir_entity *sign_bit_const = create_float_const_entity(irg, tv);
/* xXorp needs a 128-bit memory address since it's a vector instruction.
* Setting the alignment works in this case, but is not the nice way.
* TODO: Create and set correct mode/type for the entity.
*/
set_entity_alignment(sign_bit_const, 16);
amd64_binop_addr_attr_t xor_attr;
memset(&xor_attr, 0, sizeof(xor_attr));
xor_attr.base.insn_mode = INSN_MODE_64;
xor_attr.base.base.op_mode = AMD64_OP_ADDR_REG;
xor_attr.base.addr.base_input = NO_INPUT;
xor_attr.base.addr.index_input = NO_INPUT;
xor_attr.base.addr.immediate.entity = sign_bit_const;
xor_attr.base.base.op_mode = AMD64_OP_ADDR_REG;
ir_node *xor_in[] = { in2 };
ir_node *xor = new_bd_amd64_xXorp(dbgi, block, ARRAY_SIZE(xor_in),
......
......@@ -410,8 +410,10 @@ static ir_node *create_float_const(dbg_info *dbgi, ir_node *block,
ir_tarval *create_sign_tv(ir_mode *mode)
{
unsigned size = get_mode_size_bits(mode);
assert(size == 32 || size == 64);
ir_mode *intmode = size == 32 ? mode_Iu : mode_Lu;
assert(size == 32 || size == 64 || size == 128);
ir_mode *intmode = size == 128 ? amd64_mode_xmm
: size == 64 ? mode_Lu
: mode_Iu;
ir_tarval *one = get_mode_one(intmode);
ir_tarval *sign = tarval_shl_unsigned(one, size-1);
return tarval_bitcast(sign, mode);
......@@ -1302,6 +1304,7 @@ static ir_node *gen_float_neg(ir_node *const node)
amd64_binop_addr_attr_t attr;
memset(&attr, 0, sizeof(attr));
attr.base.base.op_mode = AMD64_OP_REG_REG;
attr.base.insn_mode = INSN_MODE_64;
ir_node *xor = new_bd_amd64_xXorp(dbgi, new_block, ARRAY_SIZE(in),
in, &attr);
......
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