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Zwinkau
libfirm
Commits
c79fe4ad
Commit
c79fe4ad
authored
Mar 15, 2010
by
Matthias Braun
Browse files
fix various warnings reported by cparser
[r27300]
parent
975ab11f
Changes
49
Hide whitespace changes
Inline
Side-by-side
ir/be/becopyopt.c
View file @
c79fe4ad
...
...
@@ -311,7 +311,7 @@ static int ou_max_ind_set_costs(unit_t *ou)
int
i
,
o
,
safe_count
,
safe_costs
,
unsafe_count
,
*
unsafe_costs
;
bitset_t
*
curr
;
unsigned
pos
;
int
max
,
curr_weight
,
best_weight
=
0
;
int
curr_weight
,
best_weight
=
0
;
/* assign the nodes into two groups.
* safe: node has no interference, hence it is in every max stable set.
...
...
@@ -363,7 +363,7 @@ static int ou_max_ind_set_costs(unit_t *ou)
/* Exact Algorithm: Brute force */
curr
=
bitset_alloca
(
unsafe_count
);
bitset_set_all
(
curr
);
while
(
(
max
=
bitset_popcount
(
curr
)
)
!=
0
)
{
while
(
bitset_popcount
(
curr
)
!=
0
)
{
/* check if curr is a stable set */
for
(
i
=
bitset_next_set
(
curr
,
0
);
i
!=-
1
;
i
=
bitset_next_set
(
curr
,
i
+
1
))
for
(
o
=
bitset_next_set
(
curr
,
i
+
1
);
o
!=-
1
;
o
=
bitset_next_set
(
curr
,
o
+
1
))
/* !!!!! difference to qnode_max_ind_set(): NOT (curr, i) */
...
...
@@ -1068,7 +1068,7 @@ static void ifg_dump_at_end(FILE *file, void *self)
if
(
aidx
<
nidx
)
{
const
char
*
color
=
nr
==
ar
?
"blue"
:
"red"
;
fprintf
(
file
,
"
\t
n%
d
-- n%
d
[weight=0.01 "
,
aidx
,
nidx
);
fprintf
(
file
,
"
\t
n%
u
-- n%
u
[weight=0.01 "
,
aidx
,
nidx
);
if
(
env
->
flags
&
CO_IFG_DUMP_LABELS
)
fprintf
(
file
,
"label=
\"
%d
\"
"
,
n
->
costs
);
if
(
env
->
flags
&
CO_IFG_DUMP_COLORS
)
...
...
@@ -1223,7 +1223,7 @@ void co_driver(be_chordal_env_t *cenv)
/* Dump the interference graph in Appel's format. */
if
(
dump_flags
&
DUMP_APPEL
)
{
FILE
*
f
=
my_open
(
cenv
,
""
,
".apl"
);
fprintf
(
f
,
"# %ll
d
%ll
d
\n
"
,
after
.
costs
,
after
.
unsatisfied_edges
);
fprintf
(
f
,
"# %ll
u
%ll
u
\n
"
,
after
.
costs
,
after
.
unsatisfied_edges
);
co_dump_appel_graph
(
co
,
f
);
fclose
(
f
);
}
...
...
ir/be/beifg_clique.c
View file @
c79fe4ad
...
...
@@ -174,7 +174,6 @@ static cli_head_t *get_next_cli_head(const ir_node *irn, cli_iter_t *it) /* ...c
cli_element_t
*
element
;
int
is_dominated_by_max
;
//int dominates_min;
if
(
it
->
curr_cli_head
==
NULL
||
it
->
curr_cli_head
->
next_cli_head
==
NULL
)
/* way back of recursion or this is the last clique */
{
...
...
@@ -185,7 +184,6 @@ static cli_head_t *get_next_cli_head(const ir_node *irn, cli_iter_t *it) /* ...c
head
=
it
->
curr_cli_head
->
next_cli_head
;
is_dominated_by_max
=
value_dominates
(
head
->
max
,
irn
);
//dominates_min = value_dominates(irn, head->min);
if
((
is_dominated_by_max
)
||
(
irn
==
head
->
max
))
/* node could be in clique */
{
...
...
@@ -364,7 +362,6 @@ static void find_first_neighbour(const ifg_clique_t *ifg, cli_iter_t *it, const
bitset_t
*
bitset_visneighbours
=
bitset_malloc
(
get_irg_last_idx
(
ifg
->
env
->
irg
));
int
is_dominated_by_max
=
0
;
int
dominates_min
=
0
;
int
is_in_clique
=
0
;
it
->
curr_cli_head
=
cli_head
;
...
...
@@ -374,7 +371,6 @@ static void find_first_neighbour(const ifg_clique_t *ifg, cli_iter_t *it, const
assert
(
cli_head
&&
"There is no root entry for a cli_head."
);
is_dominated_by_max
=
value_dominates
(
cli_head
->
max
,
irn
);
dominates_min
=
value_dominates
(
irn
,
cli_head
->
min
);
if
((
is_dominated_by_max
)
||
(
irn
==
cli_head
->
max
))
/* node could be in clique */
{
...
...
ir/be/bepressurestat.c
View file @
c79fe4ad
...
...
@@ -141,7 +141,7 @@ void be_analyze_regpressure(be_irg_t *birg, const arch_register_class_t *cls, co
irg_block_walk_graph
(
irg
,
regpressureanawalker
,
NULL
,
&
ra
);
for
(
i
=
0
;
i
<=
MAXPRESSURE
;
++
i
)
{
fprintf
(
f
,
"%
d
\n
"
,
stat
[
i
]);
fprintf
(
f
,
"%
u
\n
"
,
stat
[
i
]);
}
fclose
(
f
);
...
...
ir/be/beschedmris.c
View file @
c79fe4ad
...
...
@@ -224,14 +224,14 @@ static void lineage_formation(mris_env_t *env)
while
(
lowest_desc
)
{
mris_irn_t
*
lowest_mi
=
get_mris_irn
(
env
,
lowest_desc
);
mris_irn_t
*
highest_mi
=
get_mris_irn
(
env
,
highest_node
);
int
highest_is_tuple
=
get_irn_mode
(
highest_node
)
==
mode_T
;
int
n_desc
;
DBG
((
dbg
,
LEVEL_2
,
"
\t
lowest descendant %+F height %d
\n
"
,
lowest_desc
,
get_irn_height
(
env
->
heights
,
lowest_desc
)));
/* count the number of all descendants which are not the lowest descendant */
for
(
n_desc
=
0
;
in
[
n_desc
];
++
n_desc
);
for
(
n_desc
=
0
;
in
[
n_desc
];
++
n_desc
)
{
}
/*
we insert a CopyKeep node to express the artificial dependencies from the lowest
...
...
@@ -242,12 +242,7 @@ static void lineage_formation(mris_env_t *env)
int
i
,
n
;
for
(
i
=
0
,
n
=
get_irn_ins_or_deps
(
lowest_desc
);
i
<
n
;
++
i
)
{
ir_node
*
cmp
;
op
=
get_irn_in_or_dep
(
lowest_desc
,
i
);
cmp
=
highest_is_tuple
?
skip_Projs
(
op
)
:
op
;
// if (cmp == highest_node)
op
=
get_irn_in_or_dep
(
lowest_desc
,
i
);
if
(
op
==
highest_node
)
break
;
}
...
...
ir/be/bespillbelady.c
View file @
c79fe4ad
...
...
@@ -237,7 +237,7 @@ static inline const loc_t *workset_contains(const workset_t *ws,
#define workset_set_length(ws, length) (ws)->len = length
#define workset_get_length(ws) ((ws)->len)
#define workset_get_val(ws, i) ((ws)->vals[i].node)
#define workset_sort(ws) qsort((ws)->vals, (ws)->len, sizeof((ws)->vals[0]), loc_compare);
#define workset_sort(ws)
do {
qsort((ws)->vals, (ws)->len, sizeof((ws)->vals[0]), loc_compare);
} while(0)
typedef
struct
_block_info_t
{
...
...
@@ -336,14 +336,6 @@ static void displace(workset_t *new_vals, int is_usage)
/* Only make more free room if we do not have enough */
if
(
spills_needed
>
0
)
{
ir_node
*
curr_bb
=
NULL
;
workset_t
*
ws_start
=
NULL
;
if
(
move_spills
)
{
curr_bb
=
get_nodes_block
(
instr
);
ws_start
=
get_block_info
(
curr_bb
)
->
start_workset
;
}
DB
((
dbg
,
DBG_DECIDE
,
" disposing %d values
\n
"
,
spills_needed
));
/* calculate current next-use distance for live values */
...
...
ir/be/bespillutil.c
View file @
c79fe4ad
...
...
@@ -372,7 +372,6 @@ void be_add_reload_on_edge(spill_env_t *env, ir_node *to_spill, ir_node *block,
void
be_spill_phi
(
spill_env_t
*
env
,
ir_node
*
node
)
{
ir_node
*
block
;
spill_info_t
*
spill
;
int
i
,
arity
;
assert
(
is_Phi
(
node
));
...
...
@@ -381,11 +380,9 @@ void be_spill_phi(spill_env_t *env, ir_node *node)
/* create spills for the phi arguments */
block
=
get_nodes_block
(
node
);
spill
=
get_spillinfo
(
env
,
node
);
for
(
i
=
0
,
arity
=
get_irn_arity
(
node
);
i
<
arity
;
++
i
)
{
ir_node
*
arg
=
get_irn_n
(
node
,
i
);
ir_node
*
insert
;
//get_spillinfo(env, arg);
/* some backends have virtual noreg/unknown nodes that are not scheduled
* and simply always available. */
...
...
ir/be/bessadestr.c
View file @
c79fe4ad
...
...
@@ -363,7 +363,8 @@ static void set_regs_or_place_dupls_walker(ir_node *bl, void *data)
set_irn_n
(
phi
,
i
,
dupl
);
set_reg
(
dupl
,
phi_reg
);
/* skip the Perm's Projs and insert the copies behind. */
for
(
ins
=
sched_next
(
perm
);
is_Proj
(
ins
);
ins
=
sched_next
(
ins
));
for
(
ins
=
sched_next
(
perm
);
is_Proj
(
ins
);
ins
=
sched_next
(
ins
))
{
}
sched_add_before
(
ins
,
dupl
);
pin_irn
(
dupl
,
phi_block
);
be_liveness_introduce
(
lv
,
dupl
);
...
...
ir/be/ia32/ia32_address_mode.c
View file @
c79fe4ad
...
...
@@ -306,7 +306,6 @@ static int eat_shl(ia32_address_t *addr, ir_node *node)
/* Create an address mode for a given node. */
void
ia32_create_address_mode
(
ia32_address_t
*
addr
,
ir_node
*
node
,
ia32_create_am_flags_t
flags
)
{
int
res
=
0
;
ir_node
*
eat_imms
;
if
(
is_immediate
(
addr
,
node
,
0
))
{
...
...
@@ -334,7 +333,6 @@ void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, ia32_create_a
eat_imms
=
ia32_skip_downconv
(
eat_imms
);
}
res
=
1
;
node
=
eat_imms
;
#ifndef AGGRESSIVE_AM
if
(
get_irn_n_edges
(
node
)
>
1
)
{
...
...
ir/be/ia32/ia32_emitter.c
View file @
c79fe4ad
...
...
@@ -1046,7 +1046,6 @@ static void emit_ia32_Jcc(const ir_node *node)
int
need_parity_label
=
0
;
const
ir_node
*
proj_true
;
const
ir_node
*
proj_false
;
const
ir_node
*
block
;
pn_Cmp
pnc
=
get_ia32_condcode
(
node
);
pnc
=
determine_final_pnc
(
node
,
0
,
pnc
);
...
...
@@ -1058,8 +1057,6 @@ static void emit_ia32_Jcc(const ir_node *node)
proj_false
=
get_proj
(
node
,
pn_ia32_Jcc_false
);
assert
(
proj_false
&&
"Jcc without false Proj"
);
block
=
get_nodes_block
(
node
);
if
(
can_be_fallthrough
(
proj_true
))
{
/* exchange both proj's so the second one can be omitted */
const
ir_node
*
t
=
proj_true
;
...
...
ir/be/ia32/ia32_nodes_attr.h
View file @
c79fe4ad
...
...
@@ -134,7 +134,7 @@ struct ia32_attr_t {
unsigned
attr_type
;
/**< bitfield indicating the attribute type */
#endif
};
COMPILETIME_ASSERT
(
sizeof
(
struct
ia32_attr_data_bitfield
)
<=
4
,
attr_bitfield
)
;
COMPILETIME_ASSERT
(
sizeof
(
struct
ia32_attr_data_bitfield
)
<=
4
,
attr_bitfield
)
/**
* The attributes for a Call node.
...
...
ir/be/ia32/ia32_transform.c
View file @
c79fe4ad
...
...
@@ -2004,7 +2004,6 @@ static ir_node *gen_Load(ir_node *node)
ir_node
*
index
;
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_mode
*
mode
=
get_Load_mode
(
node
);
ir_mode
*
res_mode
;
ir_node
*
new_node
;
ia32_address_t
addr
;
...
...
@@ -2030,11 +2029,9 @@ static ir_node *gen_Load(ir_node *node)
if
(
ia32_cg_config
.
use_sse2
)
{
new_node
=
new_bd_ia32_xLoad
(
dbgi
,
block
,
base
,
index
,
new_mem
,
mode
);
res_mode
=
mode_xmm
;
}
else
{
new_node
=
new_bd_ia32_vfld
(
dbgi
,
block
,
base
,
index
,
new_mem
,
mode
);
res_mode
=
mode_vfp
;
}
}
else
{
assert
(
mode
!=
mode_b
);
...
...
@@ -2046,7 +2043,6 @@ static ir_node *gen_Load(ir_node *node)
}
else
{
new_node
=
new_bd_ia32_Load
(
dbgi
,
block
,
base
,
index
,
new_mem
);
}
res_mode
=
mode_Iu
;
}
set_irn_pinned
(
new_node
,
get_irn_pinned
(
node
));
...
...
@@ -2210,7 +2206,6 @@ static ir_node *try_create_SetMem(ir_node *node, ir_node *ptr, ir_node *mem)
ir_node
*
mux_true
=
get_Mux_true
(
node
);
ir_node
*
mux_false
=
get_Mux_false
(
node
);
ir_node
*
cond
;
ir_node
*
new_mem
;
dbg_info
*
dbgi
;
ir_node
*
block
;
ir_node
*
new_block
;
...
...
@@ -2244,7 +2239,6 @@ static ir_node *try_create_SetMem(ir_node *node, ir_node *ptr, ir_node *mem)
dbgi
=
get_irn_dbg_info
(
node
);
block
=
get_nodes_block
(
node
);
new_block
=
be_transform_node
(
block
);
new_mem
=
be_transform_node
(
mem
);
new_node
=
new_bd_ia32_SetccMem
(
dbgi
,
new_block
,
addr
.
base
,
addr
.
index
,
addr
.
mem
,
flags
,
pnc
);
set_address
(
new_node
,
&
addr
);
...
...
@@ -3442,13 +3436,6 @@ static ir_node *gen_Mux(ir_node *node)
setcc_transform_t
res
;
int
step
;
/* check if flags is a cmp node and we are the only user,
i.e no other user yet */
int
permutate_allowed
=
0
;
if
(
is_ia32_Cmp
(
flags
)
&&
get_irn_n_edges
(
flags
)
==
0
)
{
/* yes, we can permutate its inputs */
permutate_allowed
=
1
;
}
find_const_transform
(
pnc
,
tv_true
,
tv_false
,
&
res
);
new_node
=
node
;
if
(
res
.
permutate_cmp_ins
)
{
...
...
@@ -5557,7 +5544,7 @@ static ir_node *gen_Proj_Cmp(ir_node *node)
*/
static
ir_node
*
gen_Proj_Bound
(
ir_node
*
node
)
{
ir_node
*
new_node
,
*
block
;
ir_node
*
new_node
;
ir_node
*
pred
=
get_Proj_pred
(
node
);
switch
(
get_Proj_proj
(
node
))
{
...
...
@@ -5565,11 +5552,9 @@ static ir_node *gen_Proj_Bound(ir_node *node)
return
be_transform_node
(
get_Bound_mem
(
pred
));
case
pn_Bound_X_regular
:
new_node
=
be_transform_node
(
pred
);
block
=
get_nodes_block
(
new_node
);
return
new_r_Proj
(
new_node
,
mode_X
,
pn_ia32_Jcc_true
);
case
pn_Bound_X_except
:
new_node
=
be_transform_node
(
pred
);
block
=
get_nodes_block
(
new_node
);
return
new_r_Proj
(
new_node
,
mode_X
,
pn_ia32_Jcc_false
);
case
pn_Bound_res
:
return
be_transform_node
(
get_Bound_index
(
pred
));
...
...
@@ -5686,91 +5671,91 @@ static void register_transformers(void)
clear_irp_opcodes_generic_func
();
#define GEN(a) { be_transform_func *func = gen_##a; op_##a->ops.generic = (op_func) func; }
#define BAD(a) op_##a->ops.generic = (op_func)bad_transform
GEN
(
Add
)
;
GEN
(
Sub
)
;
GEN
(
Mul
)
;
GEN
(
Mulh
)
;
GEN
(
And
)
;
GEN
(
Or
)
;
GEN
(
Eor
)
;
GEN
(
Shl
)
;
GEN
(
Shr
)
;
GEN
(
Shrs
)
;
GEN
(
Rotl
)
;
GEN
(
Quot
)
;
GEN
(
Div
)
;
GEN
(
Mod
)
;
GEN
(
DivMod
)
;
GEN
(
Minus
)
;
GEN
(
Conv
)
;
GEN
(
Abs
)
;
GEN
(
Not
)
;
GEN
(
Load
)
;
GEN
(
Store
)
;
GEN
(
Cond
)
;
GEN
(
Cmp
)
;
GEN
(
ASM
)
;
GEN
(
CopyB
)
;
GEN
(
Mux
)
;
GEN
(
Proj
)
;
GEN
(
Phi
)
;
GEN
(
Jmp
)
;
GEN
(
IJmp
)
;
GEN
(
Bound
)
;
#define BAD(a)
{
op_##a->ops.generic = (op_func)bad_transform
; }
GEN
(
Add
)
GEN
(
Sub
)
GEN
(
Mul
)
GEN
(
Mulh
)
GEN
(
And
)
GEN
(
Or
)
GEN
(
Eor
)
GEN
(
Shl
)
GEN
(
Shr
)
GEN
(
Shrs
)
GEN
(
Rotl
)
GEN
(
Quot
)
GEN
(
Div
)
GEN
(
Mod
)
GEN
(
DivMod
)
GEN
(
Minus
)
GEN
(
Conv
)
GEN
(
Abs
)
GEN
(
Not
)
GEN
(
Load
)
GEN
(
Store
)
GEN
(
Cond
)
GEN
(
Cmp
)
GEN
(
ASM
)
GEN
(
CopyB
)
GEN
(
Mux
)
GEN
(
Proj
)
GEN
(
Phi
)
GEN
(
Jmp
)
GEN
(
IJmp
)
GEN
(
Bound
)
/* transform ops from intrinsic lowering */
GEN
(
ia32_l_Add
)
;
GEN
(
ia32_l_Adc
)
;
GEN
(
ia32_l_Mul
)
;
GEN
(
ia32_l_IMul
)
;
GEN
(
ia32_l_ShlDep
)
;
GEN
(
ia32_l_ShrDep
)
;
GEN
(
ia32_l_SarDep
)
;
GEN
(
ia32_l_ShlD
)
;
GEN
(
ia32_l_ShrD
)
;
GEN
(
ia32_l_Sub
)
;
GEN
(
ia32_l_Sbb
)
;
GEN
(
ia32_l_LLtoFloat
)
;
GEN
(
ia32_l_FloattoLL
)
;
GEN
(
Const
)
;
GEN
(
SymConst
)
;
GEN
(
Unknown
)
;
GEN
(
ia32_l_Add
)
GEN
(
ia32_l_Adc
)
GEN
(
ia32_l_Mul
)
GEN
(
ia32_l_IMul
)
GEN
(
ia32_l_ShlDep
)
GEN
(
ia32_l_ShrDep
)
GEN
(
ia32_l_SarDep
)
GEN
(
ia32_l_ShlD
)
GEN
(
ia32_l_ShrD
)
GEN
(
ia32_l_Sub
)
GEN
(
ia32_l_Sbb
)
GEN
(
ia32_l_LLtoFloat
)
GEN
(
ia32_l_FloattoLL
)
GEN
(
Const
)
GEN
(
SymConst
)
GEN
(
Unknown
)
/* we should never see these nodes */
BAD
(
Raise
)
;
BAD
(
Sel
)
;
BAD
(
InstOf
)
;
BAD
(
Cast
)
;
BAD
(
Free
)
;
BAD
(
Tuple
)
;
BAD
(
Id
)
;
//BAD(Bad)
;
BAD
(
Confirm
)
;
BAD
(
Filter
)
;
BAD
(
CallBegin
)
;
BAD
(
EndReg
)
;
BAD
(
EndExcept
)
;
BAD
(
Raise
)
BAD
(
Sel
)
BAD
(
InstOf
)
BAD
(
Cast
)
BAD
(
Free
)
BAD
(
Tuple
)
BAD
(
Id
)
//BAD(Bad)
BAD
(
Confirm
)
BAD
(
Filter
)
BAD
(
CallBegin
)
BAD
(
EndReg
)
BAD
(
EndExcept
)
/* handle builtins */
GEN
(
Builtin
)
;
GEN
(
Builtin
)
/* handle generic backend nodes */
GEN
(
be_FrameAddr
)
;
GEN
(
be_Call
)
;
GEN
(
be_IncSP
)
;
GEN
(
be_Return
)
;
GEN
(
be_AddSP
)
;
GEN
(
be_SubSP
)
;
GEN
(
be_Copy
)
;
GEN
(
be_FrameAddr
)
GEN
(
be_Call
)
GEN
(
be_IncSP
)
GEN
(
be_Return
)
GEN
(
be_AddSP
)
GEN
(
be_SubSP
)
GEN
(
be_Copy
)
#undef GEN
#undef BAD
...
...
ir/be/ia32/ia32_x87.c
View file @
c79fe4ad
...
...
@@ -1066,7 +1066,7 @@ static int sim_binop(x87_state *state, ir_node *n, const exchange_tmpl *tmpl)
*/
static
int
sim_unop
(
x87_state
*
state
,
ir_node
*
n
,
ir_op
*
op
)
{
int
op1_idx
,
out_idx
;
int
op1_idx
;
x87_simulator
*
sim
=
state
->
sim
;
const
arch_register_t
*
op1
=
x87_get_irn_register
(
get_irn_n
(
n
,
UNOP_IDX
));
const
arch_register_t
*
out
=
x87_get_irn_register
(
n
);
...
...
@@ -1092,7 +1092,6 @@ static int sim_unop(x87_state *state, ir_node *n, ir_op *op)
}
x87_set_tos
(
state
,
arch_register_get_index
(
out
),
x87_patch_insn
(
n
,
op
));
out_idx
=
0
;
attr
=
get_ia32_x87_attr
(
n
);
attr
->
x87
[
0
]
=
op1
=
&
ia32_st_regs
[
0
];
attr
->
x87
[
2
]
=
out
=
&
ia32_st_regs
[
0
];
...
...
@@ -1318,15 +1317,13 @@ static int sim_fisttp(x87_state *state, ir_node *n)
ir_node
*
val
=
get_irn_n
(
n
,
n_ia32_vfst_val
);
const
arch_register_t
*
op2
=
x87_get_irn_register
(
val
);
ia32_x87_attr_t
*
attr
;
int
op2_reg_idx
,
op2_idx
,
depth
;
int
op2_reg_idx
,
op2_idx
;
op2_reg_idx
=
arch_register_get_index
(
op2
);
op2_idx
=
x87_on_stack
(
state
,
op2_reg_idx
);
DB
((
dbg
,
LEVEL_1
,
">>> %+F %s ->
\n
"
,
n
,
arch_register_get_name
(
op2
)));
assert
(
op2_idx
>=
0
);
depth
=
x87_get_depth
(
state
);
/* Note: although the value is still live here, it is destroyed because
of the pop. The register allocator is aware of that and introduced a copy
if the value must be alive. */
...
...
ir/be/mips/mips_util.h
View file @
c79fe4ad
...
...
@@ -26,6 +26,6 @@
#ifndef FIRM_BE_MIPS_MIPS_UTIL_H
#define FIRM_BE_MIPS_MIPS_UTIL_H
#define ASSERT_NO_FLOAT(mode) { assert( (!mode_is_float(mode)) && "floating point not supported (yet)"); }
#define ASSERT_NO_FLOAT(mode)
do
{ assert( (!mode_is_float(mode)) && "floating point not supported (yet)"); }
while(0)
#endif
ir/be/scripts/generate_new_opcodes.pl
View file @
c79fe4ad
...
...
@@ -445,6 +445,7 @@ EOF
${attr_init_code}
${custominit}
info = be_get_info(res);
(void) info; /* avoid potential warning */
${set_out_reqs}
EOF
...
...
ir/debug/debugger.c
View file @
c79fe4ad
...
...
@@ -187,7 +187,7 @@ do { \
#define FIRM_DBG_MINOR 0
/** for automatic detection of the debug extension */
static
const
char
firm_debug_info_string
[]
=
static
const
char
__attribute__
((
used
))
firm_debug_info_string
[]
=
API_VERSION
(
FIRM_DBG_MAJOR
,
FIRM_DBG_MINOR
);
int
firm_debug_active
(
void
)
...
...
@@ -464,7 +464,7 @@ static void update_hooks(breakpoint *bp)
CASE_ON
(
BP_ON_NEW_ENT
,
new_entity
);
CASE_ON
(
BP_ON_NEW_TYPE
,
new_type
);
default:
;
break
;
}
}
else
{
...
...
@@ -477,7 +477,7 @@ static void update_hooks(breakpoint *bp)
CASE_OFF
(
BP_ON_NEW_ENT
,
new_entity
);
CASE_OFF
(
BP_ON_NEW_TYPE
,
new_type
);
default:
;
break
;
}
}
#undef CASE_ON
...
...
ir/ir/irarch.c
View file @
c79fe4ad
...
...
@@ -921,7 +921,8 @@ ir_node *arch_dep_replace_div_by_const(ir_node *irn)
tarval
*
tv
,
*
ntv
;
dbg_info
*
dbg
;
int
n
,
bits
;
int
k
,
n_flag
;
int
k
;
int
n_flag
=
0
;
if
(
!
is_Const
(
c
))
return
irn
;
...
...
@@ -1113,7 +1114,8 @@ void arch_dep_replace_divmod_by_const(ir_node **div, ir_node **mod, ir_node *irn
tarval
*
tv
,
*
ntv
;
dbg_info
*
dbg
;
int
n
,
bits
;
int
k
,
n_flag
;
int
k
;
int
n_flag
=
0
;
if
(
!
is_Const
(
c
))
return
;
...
...
ir/ir/irargs.c
View file @
c79fe4ad
...
...
@@ -186,7 +186,7 @@ static int firm_emit(lc_appendable_t *app,
snprintf
(
buf
,
sizeof
(
buf
),
"%s%s %s"
,
A
(
"irn"
),
get_irn_opname
(
X
),
get_mode_name
(
get_irn_mode
(
X
)));
}
snprintf
(
add
,
sizeof
(
add
),
"[%ld:%
d
]"
,
get_irn_node_nr
(
X
),
get_irn_idx
(
X
));
snprintf
(
add
,
sizeof
(
add
),
"[%ld:%
u
]"
,
get_irn_node_nr
(
X
),
get_irn_idx
(
X
));
}
break
;
case
k_ir_mode
:
...
...
ir/ir/irdump.c
View file @
c79fe4ad
...
...
@@ -1244,7 +1244,7 @@ int dump_node_label(FILE *F, ir_node *n)
bad
|=
dump_node_typeinfo
(
F
,
n
);
bad
|=
dump_node_nodeattr
(
F
,
n
);
if
(
dump_node_idx_labels
)
{
fprintf
(
F
,
"%ld:%
d
"
,
get_irn_node_nr
(
n
),
get_irn_idx
(
n
));
fprintf
(
F
,
"%ld:%
u
"
,
get_irn_node_nr
(
n
),
get_irn_idx
(
n
));
}
else
{
fprintf
(
F
,
"%ld"
,
get_irn_node_nr
(
n
));
}
...
...
@@ -1260,7 +1260,7 @@ int dump_vrp_info(FILE *F, ir_node *n)
return
1
;
}
fprintf
(
F
,
"range_type: %d
\n
"
,
vrp
->
range_type
);
fprintf
(
F
,
"range_type: %d
\n
"
,
(
int
)
vrp
->
range_type
);
if
(
vrp
->
range_type
==
VRP_RANGE
||
vrp
->
range_type
==
VRP_ANTIRANGE
)
{
ir_fprintf
(
F
,
"range_bottom: %F
\n
"
,
vrp
->
range_bottom
);
...
...
@@ -1345,8 +1345,6 @@ static void dump_node_vcgattr(FILE *F, ir_node *node, ir_node *local, int bad)
print_vcg_color
(
F
,
ird_color_uses_memory
);
}
else
if
(
is_op_cfopcode
(
op
)
||
is_op_forking
(
op
))
{
print_vcg_color
(
F
,
ird_color_controlflow
);
}
else
{
PRINT_DEFAULT_NODE_ATTR
;
}
}
}
...
...
@@ -2076,8 +2074,7 @@ static void dump_entity_node(FILE *F, ir_entity *ent)
{
fprintf
(
F
,
"node: {title:
\"
"
);
PRINT_ENTID
(
ent
);
fprintf
(
F
,
"
\"
"
);
fprintf
(
F
,
DEFAULT_TYPE_ATTRIBUTE
);
fprintf
(
F
,
"label: "
);
fprintf
(
F
,
" label: "
);
fprintf
(
F
,
"
\"
%s
\"
"
,
get_ent_dump_name
(
ent
));
print_vcg_color
(
F
,
ird_color_entity
);
...
...
@@ -2103,8 +2100,7 @@ static void dump_enum_item(FILE *F, ir_type *tp, int pos)
strncpy
(
buf
,
"<not set>"
,
sizeof
(
buf
));
fprintf
(
F
,
"node: {title:
\"
"
);
PRINT_ITEMID
(
tp
,
pos
);
fprintf
(
F
,
"
\"
"
);
fprintf
(
F
,
DEFAULT_ENUM_ITEM_ATTRIBUTE
);
fprintf
(
F
,
"label: "
);
fprintf
(
F
,
" label: "
);
fprintf
(
F
,
"
\"
enum item %s
\"
"
ENUM_ITEM_NODE_ATTR
,
get_id_str
(
id
));
fprintf
(
F
,
"
\n
info1:
\"
value: %s
\"
}
\n
"
,
buf
);
}
...
...
ir/ir/iredges_t.h
View file @
c79fe4ad
...
...
@@ -132,17 +132,6 @@ static inline void _edges_assure_kind(ir_graph *irg, int kind)
void
edges_init_graph_kind
(
ir_graph
*
irg
,
ir_edge_kind_t
kind
);
/**
* Notify of a edge change.
* The edge from (src, pos) -> old_tgt is redirected to tgt