Commit c85d04f8 authored by Matthias Braun's avatar Matthias Braun
Browse files

remove arch_register_type_t in favor of a simple bitfield

parent f5bccf5d
......@@ -71,7 +71,7 @@ bool arch_reg_is_allocatable(const arch_register_req_t *req,
{
if (req->cls != reg->cls)
return false;
if (reg->type & arch_register_type_virtual)
if (reg->is_virtual)
return true;
if (arch_register_req_is(req, limited))
return rbitset_is_set(req->limited, reg->index);
......
......@@ -20,15 +20,6 @@
#include "beinfo.h"
#include "be.h"
typedef enum arch_register_type_t {
arch_register_type_none = 0,
/** This is just a virtual register. Virtual registers fulfill any register
* constraints as long as the register class matches. It is a allowed to
* have multiple definitions for the same virtual register at a point */
arch_register_type_virtual = 1U << 0,
} arch_register_type_t;
ENUM_BITSET(arch_register_type_t)
/**
* Different types of register allocation requirements.
*/
......@@ -186,7 +177,6 @@ struct arch_register_t {
arch_register_class_t const *cls; /**< The class of the register */
/** register constraint allowing just this register */
const arch_register_req_t *single_req;
arch_register_type_t type; /**< The type of the register. */
unsigned short index; /**< The index of the register in
the class. */
unsigned short global_index; /**< The global index this
......@@ -195,6 +185,10 @@ struct arch_register_t {
unsigned short dwarf_number;
/** register number in instruction encoding */
unsigned short encoding;
/** This is just a virtual register. Virtual registers fulfill any register
* constraints as long as the register class matches. It is allowed to
* have multiple definitions for the same virtual register at a point */
bool is_virtual : 1;
};
/**
......
......@@ -40,7 +40,7 @@ static void clear_reg_value(ir_node *node)
if (reg == NULL) {
panic("no register assigned at %+F", node);
}
if (reg->type & arch_register_type_virtual)
if (reg->is_virtual)
return;
DB((dbg, LEVEL_1, "Clear Register %s\n", reg->name));
......@@ -57,7 +57,7 @@ static void set_reg_value(ir_node *node)
if (reg == NULL) {
panic("no register assigned at %+F", node);
}
if (reg->type & arch_register_type_virtual)
if (reg->is_virtual)
return;
DB((dbg, LEVEL_1, "Set Register %s: %+F\n", reg->name, node));
......
......@@ -1293,7 +1293,7 @@ static void add_phi_permutations(ir_node *block, int p)
ir_node *op = pred_info->assignments[a];
const arch_register_t *op_reg = arch_get_irn_register(op);
/* Virtual registers are ok, too. */
if (op_reg->type & arch_register_type_virtual)
if (op_reg->is_virtual)
continue;
permutation[regn] = a;
......
......@@ -702,7 +702,7 @@ static void prepare_constr_insn(ir_node *const node)
continue;
/* Precolored with an ignore register (which is not virtual). */
if ((reg->type & arch_register_type_virtual) ||
if ((reg->is_virtual) ||
rbitset_is_set(birg->allocatable_regs, reg->global_index))
continue;
......
......@@ -625,7 +625,7 @@ static void check_input_constraints(be_verify_reg_alloc_env_t *const env, ir_nod
foreach_irn_in(node, i, pred) {
const arch_register_t *pred_reg = arch_get_irn_register(pred);
if (reg != pred_reg && !(pred_reg->type & arch_register_type_virtual)) {
if (reg != pred_reg && !(pred_reg->is_virtual)) {
const char *pred_name = pred_reg != NULL ? pred_reg->name : "(null)";
const char *reg_name = reg != NULL ? reg->name : "(null)";
verify_warnf(node, "input %d of %+F uses register %s instead of %s", i, node, pred_name, reg_name);
......@@ -638,7 +638,7 @@ static void check_input_constraints(be_verify_reg_alloc_env_t *const env, ir_nod
static void value_used(be_verify_reg_alloc_env_t *const env, ir_node const **const registers, ir_node const *const block, ir_node const *const node)
{
const arch_register_t *reg = arch_get_irn_register(node);
if (reg == NULL || reg->type & arch_register_type_virtual)
if (reg == NULL || reg->is_virtual)
return;
const arch_register_req_t *req = arch_get_irn_register_req(node);
......@@ -660,7 +660,7 @@ static void value_def(be_verify_reg_alloc_env_t *const env, ir_node const **cons
{
const arch_register_t *reg = arch_get_irn_register(node);
if (reg == NULL || reg->type & arch_register_type_virtual)
if (reg == NULL || reg->is_virtual)
return;
const arch_register_req_t *req = arch_get_irn_register_req(node);
......
......@@ -34,13 +34,6 @@ use strict "subs";
my $target_c = $target_dir."/gen_".$arch."_regalloc_if.c";
my $target_h = $target_dir."/gen_".$arch."_regalloc_if.h";
# helper function
sub map_flags {
my $prefix = shift;
my $flags = shift || "none";
return join(" | ", map { "$prefix$_" } split(/\s*\|\s*/, $flags));
}
# stacks for output
my $regtypes_def; # stack for the register type variables definitions
my @regclasses; # stack for the register class variables
......@@ -158,7 +151,12 @@ EOF
foreach (@class) {
my $name = $_->{"name"};
my $ucname = uc($name);
my $type = map_flags("arch_register_type_", $_->{"type"});
my $is_virtual = "false";
for ($_->{"type"}) {
if (defined($_) && $_ eq "virtual") {
$is_virtual = "true";
}
}
# realname is name if not set by user
$_->{"realname"} = $_->{"name"} if (! exists($_->{"realname"}));
my $realname = $_->{realname};
......@@ -180,11 +178,11 @@ EOF
.name = "${realname}",
.cls = ${class_ptr},
.single_req = &${arch}_single_reg_req_${old_classname}_${name},
.type = ${type},
.index = REG_${classuc}_${ucname},
.global_index = REG_${ucname},
.dwarf_number = ${dwarf_number},
.encoding = ${encoding},
.is_virtual = ${is_virtual},
},
EOF
......
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