Commit ca21c59e authored by Matthias Braun's avatar Matthias Braun
Browse files

- remove block parameter from new_r_Proj and new_rd_Proj

- cleanup ir_spec generation a bit

[r27251]
parent f5400d9d
......@@ -1807,13 +1807,11 @@ ir_node *new_rd_Sync(dbg_info *db, ir_node *block, int arity, ir_node *in[]);
* position of the value within the tuple.
*
* @param *db A pointer for debug information.
* @param *block The IR block the node belongs to.
* @param arg A node producing a tuple. The node must have mode_T.
* @param *mode The mode of the value to project.
* @param proj The position of the value in the tuple.
*/
ir_node *new_rd_Proj(dbg_info *db, ir_node *block, ir_node *arg,
ir_mode *mode, long proj);
ir_node *new_rd_Proj(dbg_info *db, ir_node *arg, ir_mode *mode, long proj);
/** Constructor for a defaultProj node.
*
......@@ -1824,8 +1822,7 @@ ir_node *new_rd_Proj(dbg_info *db, ir_node *block, ir_node *arg,
* @param arg A node producing a tuple.
* @param max_proj The end position of the value in the tuple.
*/
ir_node *new_rd_defaultProj(dbg_info *db, ir_node *block,
ir_node *arg, long max_proj);
ir_node *new_rd_defaultProj(dbg_info *db, ir_node *arg, long max_proj);
/** Constructor for a Tuple node.
*
......@@ -2560,13 +2557,11 @@ ir_node *new_r_Sync(ir_node *block, int arity, ir_node *in[]);
* Projects a single value out of a tuple. The parameter proj gives the
* position of the value within the tuple.
*
* @param *block The IR block the node belongs to.
* @param arg A node producing a tuple.
* @param *mode The mode of the value to project.
* @param mode The mode of the value to project.
* @param proj The position of the value in the tuple.
*/
ir_node *new_r_Proj(ir_node *block, ir_node *arg,
ir_mode *mode, long proj);
ir_node *new_r_Proj(ir_node *arg, ir_mode *mode, long proj);
/** Constructor for a defaultProj node.
*
......@@ -2576,7 +2571,7 @@ ir_node *new_r_Proj(ir_node *block, ir_node *arg,
* @param arg A node producing a tuple.
* @param max_proj The end position of the value in the tuple.
*/
ir_node *new_r_defaultProj(ir_node *block, ir_node *arg, long max_proj);
ir_node *new_r_defaultProj(ir_node *arg, long max_proj);
/** Constructor for a Tuple node.
......
......@@ -843,7 +843,7 @@ static ir_node *gen_Load(ir_node *node)
/* check for special case: the loaded value might not be used */
if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
/* add a result proj and a Keep to produce a pseudo use */
ir_node *proj = new_r_Proj(block, new_load, mode_Iu, pn_arm_Ldr_res);
ir_node *proj = new_r_Proj(new_load, mode_Iu, pn_arm_Ldr_res);
be_new_Keep(block, 1, &proj);
}
......@@ -1226,7 +1226,6 @@ static ir_node *gen_be_Copy(ir_node *node)
*/
static ir_node *gen_Proj_Load(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *load = get_Proj_pred(node);
ir_node *new_load = be_transform_node(load);
dbg_info *dbgi = get_irn_dbg_info(node);
......@@ -1237,17 +1236,17 @@ static ir_node *gen_Proj_Load(ir_node *node)
case iro_arm_Ldr:
/* handle all gp loads equal: they have the same proj numbers. */
if (proj == pn_Load_res) {
return new_rd_Proj(dbgi, block, new_load, mode_Iu, pn_arm_Ldr_res);
return new_rd_Proj(dbgi, new_load, mode_Iu, pn_arm_Ldr_res);
} else if (proj == pn_Load_M) {
return new_rd_Proj(dbgi, block, new_load, mode_M, pn_arm_Ldr_M);
return new_rd_Proj(dbgi, new_load, mode_M, pn_arm_Ldr_M);
}
break;
case iro_arm_fpaLdf:
if (proj == pn_Load_res) {
ir_mode *mode = get_Load_mode(load);
return new_rd_Proj(dbgi, block, new_load, mode, pn_arm_fpaLdf_res);
return new_rd_Proj(dbgi, new_load, mode, pn_arm_fpaLdf_res);
} else if (proj == pn_Load_M) {
return new_rd_Proj(dbgi, block, new_load, mode_M, pn_arm_fpaLdf_M);
return new_rd_Proj(dbgi, new_load, mode_M, pn_arm_fpaLdf_M);
}
break;
default:
......@@ -1261,7 +1260,6 @@ static ir_node *gen_Proj_Load(ir_node *node)
*/
static ir_node *gen_Proj_CopyB(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
......@@ -1270,7 +1268,7 @@ static ir_node *gen_Proj_CopyB(ir_node *node)
switch (proj) {
case pn_CopyB_M_regular:
if (is_arm_CopyB(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_CopyB_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_CopyB_M);
}
break;
default:
......@@ -1284,7 +1282,6 @@ static ir_node *gen_Proj_CopyB(ir_node *node)
*/
static ir_node *gen_Proj_Quot(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
......@@ -1294,24 +1291,24 @@ static ir_node *gen_Proj_Quot(ir_node *node)
switch (proj) {
case pn_Quot_M:
if (is_arm_fpaDvf(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaDvf_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaDvf_M);
} else if (is_arm_fpaRdf(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaRdf_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaRdf_M);
} else if (is_arm_fpaFdv(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaFdv_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaFdv_M);
} else if (is_arm_fpaFrd(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaFrd_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaFrd_M);
}
break;
case pn_Quot_res:
if (is_arm_fpaDvf(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaDvf_res);
return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaDvf_res);
} else if (is_arm_fpaRdf(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaRdf_res);
return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaRdf_res);
} else if (is_arm_fpaFdv(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaFdv_res);
return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaFdv_res);
} else if (is_arm_fpaFrd(new_pred)) {
return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaFrd_res);
return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaFrd_res);
}
break;
default:
......@@ -1325,21 +1322,20 @@ static ir_node *gen_Proj_Quot(ir_node *node)
*/
static ir_node *gen_Proj_be_AddSP(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_AddSP_sp) {
ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_arm_SubSPandCopy_stack);
arch_set_irn_register(res, &arm_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_AddSP_res) {
return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_arm_SubSPandCopy_addr);
return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_arm_SubSPandCopy_addr);
} else if (proj == pn_be_AddSP_M) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_SubSPandCopy_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_SubSPandCopy_M);
}
panic("Unsupported Proj from AddSP");
}
......@@ -1349,19 +1345,18 @@ static ir_node *gen_Proj_be_AddSP(ir_node *node)
*/
static ir_node *gen_Proj_be_SubSP(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_SubSP_sp) {
ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_arm_AddSP_stack);
arch_set_irn_register(res, &arm_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_SubSP_M) {
return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_AddSP_M);
return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_AddSP_M);
}
panic("Unsupported Proj from SubSP");
}
......@@ -1432,8 +1427,7 @@ static ir_node *gen_Proj(ir_node *node)
ir_node *new_pred = be_transform_node(pred);
ir_mode *mode = get_irn_mode(node);
if (mode_needs_gp_reg(mode)) {
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *new_proj = new_r_Proj(block, new_pred, mode_Iu,
ir_node *new_proj = new_r_Proj(new_pred, mode_Iu,
get_Proj_proj(node));
new_proj->node_nr = node->node_nr;
return new_proj;
......
......@@ -216,7 +216,7 @@ static void transform_Reload(ir_node *node)
sched_add_after(sched_point, load);
sched_remove(node);
proj = new_rd_Proj(dbgi, block, load, mode, pn_arm_Ldr_res);
proj = new_rd_Proj(dbgi, load, mode, pn_arm_Ldr_res);
reg = arch_get_irn_register(node);
arch_set_irn_register(proj, reg);
......@@ -324,9 +324,9 @@ static ir_node *convert_dbl_to_int(ir_node *bl, ir_node *arg, ir_node *mem,
conv = new_bd_arm_fpaDbl2GP(NULL, bl, arg, mem);
/* move high/low */
*resL = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_low);
*resH = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_high);
mem = new_r_Proj(bl, conv, mode_M, pn_arm_fpaDbl2GP_M);
*resL = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_low);
*resH = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_high);
mem = new_r_Proj(conv, mode_M, pn_arm_fpaDbl2GP_M);
}
return mem;
}
......@@ -855,9 +855,9 @@ static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *
/* spill stuff */
store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
sp = new_r_Proj(block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
sp = new_r_Proj(store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
arch_set_irn_register(sp, env->arch_env->sp);
*mem = new_r_Proj(block, store, mode_M, pn_arm_StoreStackM4Inc_M);
*mem = new_r_Proj(store, mode_M, pn_arm_StoreStackM4Inc_M);
/* frame pointer is ip-4 (because ip is our old sp value) */
fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0);
......@@ -903,10 +903,10 @@ static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_m
load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem);
curr_bp = new_r_Proj(bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
curr_sp = new_r_Proj(bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
curr_pc = new_r_Proj(bl, load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
*mem = new_r_Proj(bl, load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
curr_bp = new_r_Proj(load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
curr_sp = new_r_Proj(load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
curr_pc = new_r_Proj(load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
*mem = new_r_Proj(load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
arch_set_irn_register(curr_bp, env->arch_env->bp);
arch_set_irn_register(curr_sp, env->arch_env->sp);
arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
......
......@@ -555,14 +555,14 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
ir_node *store;
ir_node *mem_input = do_seq ? curr_mem : new_NoMem();
store = new_rd_Store(dbgi, bl, mem_input, addr, param, 0);
mem = new_r_Proj(bl, store, mode_M, pn_Store_M);
mem = new_r_Proj(store, mode_M, pn_Store_M);
} else {
/* Make a mem copy for compound arguments. */
ir_node *copy;
assert(mode_is_reference(get_irn_mode(param)));
copy = new_rd_CopyB(dbgi, bl, curr_mem, addr, param, param_type);
mem = new_r_Proj(bl, copy, mode_M, pn_CopyB_M_regular);
mem = new_r_Proj(copy, mode_M, pn_CopyB_M_regular);
}
curr_ofs += param_size;
......@@ -691,7 +691,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
ARR_APP1(ir_node *, env->calls, low_call);
/* create new stack pointer */
curr_sp = new_r_Proj(bl, low_call, get_irn_mode(curr_sp), pn_be_Call_sp);
curr_sp = new_r_Proj(low_call, get_irn_mode(curr_sp), pn_be_Call_sp);
be_set_constr_single_reg_out(low_call, pn_be_Call_sp, sp,
arch_register_req_type_ignore | arch_register_req_type_produces_sp);
arch_set_irn_register(curr_sp, sp);
......@@ -715,7 +715,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
if (proj == NULL) {
ir_type *res_type = get_method_res_type(call_tp, i);
ir_mode *mode = get_type_mode(res_type);
proj = new_r_Proj(bl, low_call, mode, pn);
proj = new_r_Proj(low_call, mode, pn);
res_projs[i] = proj;
} else {
set_Proj_pred(proj, low_call);
......@@ -781,7 +781,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
in[n++] = curr_sp;
foreach_pset_new(&destroyed_regs, reg, iter) {
ir_node *proj = new_r_Proj(bl, low_call, reg->reg_class->mode, curr_res_proj);
ir_node *proj = new_r_Proj(low_call, reg->reg_class->mode, curr_res_proj);
/* memorize the register in the link field. we need afterwards to set the register class of the keep correctly. */
be_set_constr_single_reg_out(low_call, curr_res_proj, reg, 0);
......@@ -824,7 +824,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
}
if (! mem_proj) {
mem_proj = new_r_Proj(bl, low_call, mode_M, pn_be_Call_M_regular);
mem_proj = new_r_Proj(low_call, mode_M, pn_be_Call_M_regular);
keep_alive(mem_proj);
}
}
......@@ -948,7 +948,7 @@ static ir_node *adjust_alloc(be_abi_irg_t *env, ir_node *alloc, ir_node *curr_sp
ir_node *addsp_mem;
ir_node *sync;
addsp_mem = new_r_Proj(block, new_alloc, mode_M, pn_be_AddSP_M);
addsp_mem = new_r_Proj(new_alloc, mode_M, pn_be_AddSP_M);
/* We need to sync the output mem of the AddSP with the input mem
edge into the alloc node. */
......@@ -965,8 +965,7 @@ static ir_node *adjust_alloc(be_abi_irg_t *env, ir_node *alloc, ir_node *curr_sp
set_Proj_proj(alloc_res, pn_be_AddSP_res);
addr = alloc_res;
curr_sp = new_r_Proj(block, new_alloc, get_irn_mode(curr_sp),
pn_be_AddSP_sp);
curr_sp = new_r_Proj(new_alloc, get_irn_mode(curr_sp), pn_be_AddSP_sp);
return curr_sp;
}
......@@ -1014,8 +1013,8 @@ static ir_node *adjust_free(be_abi_irg_t *env, ir_node *free, ir_node *curr_sp)
subsp = be_new_SubSP(env->arch_env->sp, block, curr_sp, size);
set_irn_dbg_info(subsp, dbg);
mem = new_r_Proj(block, subsp, mode_M, pn_be_SubSP_M);
res = new_r_Proj(block, subsp, sp_mode, pn_be_SubSP_sp);
mem = new_r_Proj(subsp, mode_M, pn_be_SubSP_M);
res = new_r_Proj(subsp, sp_mode, pn_be_SubSP_sp);
/* we need to sync the memory */
in[0] = get_Free_mem(free);
......@@ -1325,7 +1324,7 @@ static ir_node *create_barrier(ir_node *bl, ir_node **mem, pmap *regs,
add_type |= arch_register_req_type_produces_sp;
}
proj = new_r_Proj(bl, irn, get_irn_mode(pred), n);
proj = new_r_Proj(irn, get_irn_mode(pred), n);
be_node_set_reg_class_in(irn, n, reg->reg_class);
if (in_req)
be_set_constr_single_reg_in(irn, n, reg, 0);
......@@ -1336,7 +1335,7 @@ static ir_node *create_barrier(ir_node *bl, ir_node **mem, pmap *regs,
}
if (mem) {
*mem = new_r_Proj(bl, irn, mode_M, n);
*mem = new_r_Proj(irn, mode_M, n);
}
return irn;
......@@ -1612,7 +1611,7 @@ static void fix_address_of_parameter_access(be_abi_irg_t *env, ent_pos_pair *val
save_optimization_state(&state);
set_optimize(0);
nmem = new_r_Proj(start_bl, get_irg_start(irg), mode_M, pn_Start_M);
nmem = new_r_Proj(get_irg_start(irg), mode_M, pn_Start_M);
restore_optimization_state(&state);
/* reroute all edges to the new memory source */
......@@ -1632,11 +1631,11 @@ static void fix_address_of_parameter_access(be_abi_irg_t *env, ent_pos_pair *val
addr = be_new_FrameAddr(env->arch_env->sp->reg_class, first_bl, frame, entry->ent);
if (store)
mem = new_r_Proj(first_bl, store, mode_M, pn_Store_M);
mem = new_r_Proj(store, mode_M, pn_Store_M);
/* the backing store itself */
store = new_r_Store(first_bl, mem, addr,
new_r_Proj(args_bl, args, mode, i), 0);
new_r_Proj(args, mode, i), 0);
}
/* the new memory Proj gets the last Proj from store */
set_Proj_pred(nmem, store);
......@@ -1945,7 +1944,7 @@ static void modify_irg(be_abi_irg_t *env)
add_type |= arch_register_req_type_produces_sp | arch_register_req_type_ignore;
assert(nr >= 0);
proj = new_r_Proj(start_bl, env->start, mode, nr + 1);
proj = new_r_Proj(env->start, mode, nr + 1);
pmap_insert(env->regs, (void *) reg, proj);
be_set_constr_single_reg_out(env->start, nr + 1, reg, add_type);
arch_set_irn_register(proj, reg);
......@@ -1956,7 +1955,7 @@ static void modify_irg(be_abi_irg_t *env)
/* create a new initial memory proj */
assert(is_Proj(old_mem));
arch_set_out_register_req(env->start, 0, arch_no_register_req);
new_mem_proj = new_r_Proj(start_bl, env->start, mode_M, 0);
new_mem_proj = new_r_Proj(env->start, mode_M, 0);
mem = new_mem_proj;
set_irg_initial_mem(irg, mem);
......@@ -2012,7 +2011,7 @@ static void modify_irg(be_abi_irg_t *env)
ir_mode *load_mode = arg->load_mode;
ir_node *load = new_r_Load(start_bl, new_NoMem(), addr, load_mode, cons_floats);
repl = new_r_Proj(start_bl, load, load_mode, pn_Load_res);
repl = new_r_Proj(load, load_mode, pn_Load_res);
if (mode != load_mode) {
repl = new_r_Conv(start_bl, repl, mode);
......@@ -2238,7 +2237,7 @@ static void fix_pic_symconsts(ir_node *node, void *data)
module. The loads are always safe and can therefore float
and need no memory input */
load = new_r_Load(block, new_NoMem(), add, mode, cons_floats);
load_res = new_r_Proj(block, load, mode, pn_Load_res);
load_res = new_r_Proj(load, mode, pn_Load_res);
set_irn_n(node, i, load_res);
}
......
......@@ -145,9 +145,8 @@ static void rematerialize_or_move(ir_node *flags_needed, ir_node *node,
copy = remat(flags_needed, node);
if (get_irn_mode(copy) == mode_T) {
ir_node *block = get_nodes_block(copy);
ir_mode *mode = flag_class->mode;
value = new_rd_Proj(NULL, block, copy, mode, pn);
ir_mode *mode = flag_class->mode;
value = new_rd_Proj(NULL, copy, mode, pn);
} else {
value = copy;
}
......
......@@ -124,7 +124,7 @@ ir_node *insert_Perm_after(be_irg_t *birg,
be_ssa_construction_env_t senv;
ir_mode *mode = get_irn_mode(perm_op);
ir_node *proj = new_r_Proj(bl, perm, mode, i);
ir_node *proj = new_r_Proj(perm, mode, i);
arch_set_irn_register(proj, reg);
curr = proj;
......
......@@ -428,7 +428,7 @@ static void lower_perm_node(ir_node *irn, lower_env_t *env)
int pidx = get_pairidx_for_in_regidx(pairs, n, cycle.elems[i]->index);
/* create intermediate proj */
res1 = new_r_Proj(block, cpyxchg, get_irn_mode(res1), 0);
res1 = new_r_Proj(cpyxchg, get_irn_mode(res1), 0);
/* set as in for next Perm */
pairs[pidx].in_node = res1;
......
......@@ -822,11 +822,10 @@ ir_node *be_new_Barrier(ir_node *bl, int n, ir_node *in[])
ir_node *be_Barrier_append_node(ir_node *barrier, ir_node *node)
{
ir_node *block = get_nodes_block(barrier);
ir_mode *mode = get_irn_mode(node);
int n = add_irn_n(barrier, node);
ir_node *proj = new_r_Proj(block, barrier, mode, n);
ir_node *proj = new_r_Proj(barrier, mode, n);
add_register_req_in(barrier);
add_register_req_out(barrier);
......
......@@ -1021,12 +1021,12 @@ static void permute_values(ir_nodeset_t *live_nodes, ir_node *before,
DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
perm, in[0], in[1], before));
proj0 = new_r_Proj(block, perm, get_irn_mode(in[0]), 0);
proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
mark_as_copy_of(proj0, in[0]);
reg = arch_register_for_index(cls, old_r);
use_reg(proj0, reg);
proj1 = new_r_Proj(block, perm, get_irn_mode(in[1]), 1);
proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
mark_as_copy_of(proj1, in[1]);
reg = arch_register_for_index(cls, r2);
use_reg(proj1, reg);
......
......@@ -182,7 +182,7 @@ static void insert_all_perms_walker(ir_node *bl, void *data)
*/
insert_after = perm;
for (pp = set_first(arg_set); pp; pp = set_next(arg_set)) {
ir_node *proj = new_r_Proj(pred_bl, perm, get_irn_mode(pp->arg), pp->pos);
ir_node *proj = new_r_Proj(perm, get_irn_mode(pp->arg), pp->pos);
pp->proj = proj;
assert(get_reg(pp->arg));
set_reg(proj, get_reg(pp->arg));
......
......@@ -325,8 +325,8 @@ static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap
/* push ebp */
push = new_bd_ia32_Push(NULL, bl, noreg, noreg, *mem, curr_bp, curr_sp);
curr_sp = new_r_Proj(bl, push, get_irn_mode(curr_sp), pn_ia32_Push_stack);
*mem = new_r_Proj(bl, push, mode_M, pn_ia32_Push_M);
curr_sp = new_r_Proj(push, get_irn_mode(curr_sp), pn_ia32_Push_stack);
*mem = new_r_Proj(push, mode_M, pn_ia32_Push_M);
/* the push must have SP out register */
arch_set_irn_register(curr_sp, arch_env->sp);
......@@ -381,8 +381,8 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
/* leave */
leave = new_bd_ia32_Leave(NULL, bl, curr_bp);
curr_bp = new_r_Proj(bl, leave, mode_bp, pn_ia32_Leave_frame);
curr_sp = new_r_Proj(bl, leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack);
curr_bp = new_r_Proj(leave, mode_bp, pn_ia32_Leave_frame);
curr_sp = new_r_Proj(leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack);
} else {
ir_node *pop;
......@@ -398,10 +398,10 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
/* pop ebp */
pop = new_bd_ia32_PopEbp(NULL, bl, *mem, curr_sp);
curr_bp = new_r_Proj(bl, pop, mode_bp, pn_ia32_Pop_res);
curr_sp = new_r_Proj(bl, pop, get_irn_mode(curr_sp), pn_ia32_Pop_stack);
curr_bp = new_r_Proj(pop, mode_bp, pn_ia32_Pop_res);
curr_sp = new_r_Proj(pop, get_irn_mode(curr_sp), pn_ia32_Pop_stack);
*mem = new_r_Proj(bl, pop, mode_M, pn_ia32_Pop_M);
*mem = new_r_Proj(pop, mode_M, pn_ia32_Pop_M);
}
arch_set_irn_register(curr_sp, arch_env->sp);
arch_set_irn_register(curr_bp, arch_env->bp);
......@@ -930,7 +930,7 @@ ir_node *turn_back_am(ir_node *node)
ir_node *noreg;
ir_node *load = new_bd_ia32_Load(dbgi, block, base, index, mem);
ir_node *load_res = new_rd_Proj(dbgi, block, load, mode_Iu, pn_ia32_Load_res);
ir_node *load_res = new_rd_Proj(dbgi, load, mode_Iu, pn_ia32_Load_res);
ia32_copy_am_attrs(load, node);
if (is_ia32_is_reload(node))
......@@ -1076,7 +1076,7 @@ static void transform_to_Load(ia32_code_gen_t *cg, ir_node *node)
DBG_OPT_RELOAD2LD(node, new_op);
proj = new_rd_Proj(dbg, block, new_op, mode, pn_ia32_Load_res);
proj = new_rd_Proj(dbg, new_op, mode, pn_ia32_Load_res);
if (sched_point) {
sched_add_after(sched_point, new_op);
......@@ -1200,12 +1200,11 @@ static ir_node *create_pop(ia32_code_gen_t *cg, ir_node *node, ir_node *schedpoi
static ir_node* create_spproj(ir_node *node, ir_node *pred, int pos)
{
dbg_info *dbg = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
ir_mode *spmode = mode_Iu;
const arch_register_t *spreg = &ia32_gp_regs[REG_ESP];
ir_node *sp;
sp = new_rd_Proj(dbg, block, pred, spmode, pos);
sp = new_rd_Proj(dbg, pred, spmode, pos);
arch_set_irn_register(sp, spreg);
return sp;
......@@ -2389,17 +2388,17 @@ static ir_node *ia32_create_trampoline_fkt(ir_node *block, ir_node *mem, ir_node
/* mov ecx,<env> */
st = new_r_Store(block, mem, p, new_Const_long(mode_Bu, 0xb9), 0);
mem = new_r_Proj(block, st, mode_M, pn_Store_M);
mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 1), mode);
st = new_r_Store(block, mem, p, env, 0);
mem = new_r_Proj(block, st, mode_M, pn_Store_M);
mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 4), mode);
/* jmp <callee> */
st = new_r_Store(block, mem, p, new_Const_long(mode_Bu, 0xe9), 0);
mem = new_r_Proj(block, st, mode_M, pn_Store_M);
mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 1), mode);
st = new_r_Store(block, mem, p, callee, 0);
mem = new_r_Proj(block, st, mode_M, pn_Store_M);
mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 4), mode);
return mem;
......
......@@ -177,7 +177,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
sched_add_before(irn, adc);
set_irn_mode(adc, mode_T);
adc_flags = new_r_Proj(block, adc, mode_Iu, pn_ia32_Adc_flags);
adc_flags = new_r_Proj(adc, mode_Iu, pn_ia32_Adc_flags);
arch_set_irn_register(adc_flags, &ia32_flags_regs[REG_EFLAGS]);
cmc = new_bd_ia32_Cmc(dbg, block, adc_flags);
......@@ -365,8 +365,8 @@ static void assure_should_be_same_requirements(ir_node *node)
in[1] = uses_out_reg;
perm = be_new_Perm(cls, block, 2, in);
perm_proj0 = new_r_Proj(block, perm, get_irn_mode(in[0]), 0);
perm_proj1 = new_r_Proj(block, perm, get_irn_mode(in[1]), 1);
perm_proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
perm_proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
arch_set_irn_register(perm_proj0, out_reg);
arch_set_irn_register(perm_proj1, in_reg);
......
......@@ -189,7 +189,7 @@ static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
set_ia32_use_frame(load);
sched_add_before(before, load);
load_res = new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
load_res = new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
/* TODO: make the actual mode configurable in ChangeCW... */
or_const = new_bd_ia32_Immediate(NULL, get_irg_start_block(irg),
......
......@@ -201,10 +201,10 @@ static int map_Add(ir_node *call, void *ctx)
/* h_res = a_h + b_h + carry */
add_low = new_bd_ia32_l_Add(dbg, block, a_l, b_l, mode_T);
flags = new_r_Proj(block, add_low, mode_flags, pn_ia32_flags);
flags = new_r_Proj(add_low, mode_flags, pn_ia32_flags);
add_high = new_bd_ia32_l_Adc(dbg, block, a_h, b_h, flags<