arm: Rename nodes to match the spelling of the assembler.

B    -> Bcc
FltX -> Flt
Jmp  -> B
Or   -> Orr
OrPl -> OrrPl

ir/be/arm/arm_emitter.c

@@ -376,11 +376,11 @@ static void emit_arm_fConst(const ir_node *irn)
 /**
  * Emit a Compare with conditional branch.
  */
-static void emit_arm_B(const ir_node *irn)
+static void emit_arm_Bcc(const ir_node *irn)
 {
 	be_cond_branch_projs_t projs = be_get_cond_branch_projs(irn);
 
-	ir_node *const op1 = get_irn_n(irn, n_arm_B_flags);
+	ir_node *const op1 = get_irn_n(irn, n_arm_Bcc_flags);
 	assert(is_arm_Cmn(op1) || is_arm_Cmp(op1) || is_arm_Tst(op1));
 
 	arm_cmp_attr_t const *const cmp_attr = get_arm_cmp_attr_const(op1);
@@ -509,7 +509,7 @@ static void emit_be_MemPerm(const ir_node *node)
 	assert(ent_offset == memperm_offset);
 }
 
-static void emit_arm_Jmp(const ir_node *node)
+static void emit_arm_B(const ir_node *node)
 {
 	BE_EMIT_JMP(arm, node, "b", node) {}
 }
@@ -528,9 +528,9 @@ static void arm_register_emitters(void)
 	/* custom emitter */
 	be_set_emitter(op_arm_Address,   emit_arm_Address);
 	be_set_emitter(op_arm_B,         emit_arm_B);
+	be_set_emitter(op_arm_Bcc,       emit_arm_Bcc);
 	be_set_emitter(op_arm_fConst,    emit_arm_fConst);
 	be_set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr);
-	be_set_emitter(op_arm_Jmp,       emit_arm_Jmp);
 	be_set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp);
 	be_set_emitter(op_be_Copy,       emit_be_Copy);
 	be_set_emitter(op_be_CopyKeep,   emit_be_Copy);

ir/be/arm/arm_new_nodes.c

@@ -42,7 +42,7 @@ static bool has_load_store_attr(const ir_node *node)
 
 static bool has_shifter_operand(const ir_node *node)
 {
-	return is_arm_Add(node) || is_arm_And(node) || is_arm_Or(node)
+	return is_arm_Add(node) || is_arm_And(node) || is_arm_Orr(node)
 		|| is_arm_Eor(node) || is_arm_Bic(node) || is_arm_Sub(node)
 		|| is_arm_Rsb(node) || is_arm_Mov(node) || is_arm_Mvn(node)
 		|| is_arm_Cmn(node) || is_arm_Cmp(node) || is_arm_Tst(node)
@@ -57,7 +57,7 @@ static bool has_cmp_attr(const ir_node *node)
 static bool has_farith_attr(const ir_node *node)
 {
 	return is_arm_Adf(node) || is_arm_Muf(node) || is_arm_Suf(node)
-	    || is_arm_Dvf(node) || is_arm_Mvf(node) || is_arm_FltX(node);
+	    || is_arm_Dvf(node) || is_arm_Mvf(node) || is_arm_Flt(node);
 }
 
 void arm_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
@@ -215,13 +215,13 @@ const arm_farith_attr_t *get_arm_farith_attr_const(const ir_node *node)
 
 arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node)
 {
-	assert(is_arm_B(node));
+	assert(is_arm_Bcc(node));
 	return (arm_CondJmp_attr_t*)get_irn_generic_attr(node);
 }
 
 const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node)
 {
-	assert(is_arm_B(node));
+	assert(is_arm_Bcc(node));
 	return (const arm_CondJmp_attr_t*)get_irn_generic_attr_const(node);
 }
 

ir/be/arm/arm_spec.pl

@@ -314,12 +314,12 @@ And => {
 	emit     => 'and %D0, %S0, %O',
 },
 
-Or => {
+Orr => {
 	template => $binop_shifter_operand,
 	emit     => 'orr %D0, %S0, %O',
 },
 
-OrPl => {
+OrrPl => {
 	#irn_flags => [ "rematerializable" ],
 	emit      => 'orrpl %D0, %S2, %O',
 	attr_type => "arm_shifter_operand_t",
@@ -468,7 +468,7 @@ Tst => {
 	emit     => 'tst %S0, %O',
 },
 
-B => {
+Bcc => {
 	op_flags  => [ "cfopcode", "forking" ],
 	state     => "pinned",
 	in_reqs   => [ "flags" ],
@@ -479,7 +479,7 @@ B => {
 	init      => "\tset_arm_CondJmp_relation(res, relation);",
 },
 
-Jmp => {
+B => {
 	state     => "pinned",
 	op_flags  => [ "cfopcode" ],
 	irn_flags => [ "simple_jump" ],
@@ -564,7 +564,7 @@ Mvf => {
 	attr      => "ir_mode *op_mode",
 },
 
-FltX => {
+Flt => {
 	irn_flags => [ "rematerializable" ],
 	in_reqs   => [ "gp" ],
 	out_reqs  => [ "fpa" ],

ir/be/arm/arm_transform.c

@@ -136,8 +136,7 @@ static ir_node *create_const_graph_value(dbg_info *dbgi, ir_node *block,
 		result = new_bd_arm_Mov_imm(dbgi, block, v.values[0], v.rors[0]);
 
 		for (unsigned cnt = 1; cnt < v.ops; ++cnt) {
-			result = new_bd_arm_Or_imm(dbgi, block, result,
-			                           v.values[cnt], v.rors[cnt]);
+			result = new_bd_arm_Orr_imm(dbgi, block, result, v.values[cnt], v.rors[cnt]);
 		}
 	}
 	return result;
@@ -241,7 +240,7 @@ static ir_node *gen_Conv(ir_node *node)
 				if (!mode_is_signed(src_mode)) {
 					panic("TODO");
 				} else {
-					return new_bd_arm_FltX(dbg, block, new_op, dst_mode);
+					return new_bd_arm_Flt(dbg, block, new_op, dst_mode);
 				}
 			}
 		} else {
@@ -799,10 +798,10 @@ static ir_node *gen_Or(ir_node *node)
 		return pkh;
 
 	static const arm_binop_factory_t or_factory = {
-		new_bd_arm_Or_reg,
-		new_bd_arm_Or_imm,
-		new_bd_arm_Or_reg_shift_reg,
-		new_bd_arm_Or_reg_shift_imm
+		new_bd_arm_Orr_reg,
+		new_bd_arm_Orr_imm,
+		new_bd_arm_Orr_reg_shift_reg,
+		new_bd_arm_Orr_reg_shift_imm
 	};
 	return gen_int_binop(node, MATCH_COMMUTATIVE | MATCH_SIZE_NEUTRAL, &or_factory);
 }
@@ -821,8 +820,7 @@ static ir_node *gen_arm_OrPl_t(ir_node *node)
 
 	dbg_info *dbgi      = get_irn_dbg_info(node);
 	ir_node  *new_block = be_transform_nodes_block(node);
-	ir_node  *res       = new_bd_arm_OrPl(dbgi, new_block, new_left, new_right,
-	                                      new_falseval, new_flags);
+	ir_node  *res       = new_bd_arm_OrrPl(dbgi, new_block, new_left, new_right, new_falseval, new_flags);
 	return res;
 }
 
@@ -1187,7 +1185,7 @@ static ir_node *gen_Jmp(ir_node *node)
 {
 	ir_node  *new_block = be_transform_nodes_block(node);
 	dbg_info *dbgi      = get_irn_dbg_info(node);
-	return new_bd_arm_Jmp(dbgi, new_block);
+	return new_bd_arm_B(dbgi, new_block);
 }
 
 static ir_node *gen_Switch(ir_node *node)
@@ -1253,7 +1251,7 @@ static ir_node *gen_Cond(ir_node *node)
 	ir_node    *const selector  = get_Cond_selector(node);
 	ir_node    *const flag_node = be_transform_node(selector);
 	ir_relation const relation  = get_Cmp_relation(selector);
-	return new_bd_arm_B(dbgi, block, flag_node, relation);
+	return new_bd_arm_Bcc(dbgi, block, flag_node, relation);
 }
 
 enum fpa_imm_mode {