be: Use one common be_null_ops instead of one per backend.

ir/be/TEMPLATE/bearch_TEMPLATE.c

@@ -36,13 +36,6 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-/* fill register allocator interface */
-
-static const arch_irn_ops_t TEMPLATE_irn_ops = {
-	.get_op_estimated_cost  = NULL,
-	.perform_memory_operand = NULL,
-};
-
 /**
  * Transforms the standard firm graph into
  * a TEMLPATE firm graph
@@ -93,7 +86,7 @@ static TEMPLATE_isa_t TEMPLATE_isa_template = {
 static void TEMPLATE_init(void)
 {
 	TEMPLATE_register_init();
-	TEMPLATE_create_opcodes(&TEMPLATE_irn_ops);
+	TEMPLATE_create_opcodes(&be_null_ops);
 }
 
 static void TEMPLATE_finish(void)

ir/be/amd64/bearch_amd64.c

@@ -119,13 +119,6 @@ static int amd64_get_sp_bias(const ir_node *node)
 	return 0;
 }
 
-/* fill register allocator interface */
-
-static const arch_irn_ops_t amd64_irn_ops = {
-	.get_op_estimated_cost  = NULL,
-	.perform_memory_operand = NULL,
-};
-
 static void amd64_before_ra(ir_graph *irg)
 {
 	be_sched_fix_flags(irg, &amd64_reg_classes[CLASS_amd64_flags], NULL, NULL, NULL);
@@ -811,7 +804,7 @@ static void amd64_init(void)
 {
 	amd64_init_types();
 	amd64_register_init();
-	amd64_create_opcodes(&amd64_irn_ops);
+	amd64_create_opcodes(&be_null_ops);
 	amd64_cconv_init();
 	x86_set_be_asm_constraint_support(&amd64_asm_constraints);
 }

ir/be/arm/arm_lower64.c

@@ -10,6 +10,7 @@
  */
 #include "arm_nodes_attr.h"
 #include "bearch_arm_t.h"
+#include "benode.h"
 #include "gen_arm_new_nodes.h"
 #include "gen_arm_regalloc_if.h"
 #include "ircons_t.h"
@@ -391,7 +392,7 @@ void arm_lower_64bit(void)
 	create_divmod_intrinsics(word_unsigned, word_signed);
 
 	/* make sure opcodes are initialized */
-	arm_create_opcodes(&arm_irn_ops);
+	arm_create_opcodes(&be_null_ops);
 
 	ir_prepare_dw_lowering(&lower_dw_params);
 	ir_register_dw_lower_function(op_Add,   lower64_add);

ir/be/arm/bearch_arm.c

@@ -59,13 +59,6 @@ arm_codegen_config_t arm_cg_config;
 ir_mode *arm_mode_gp;
 ir_mode *arm_mode_flags;
 
-/* fill register allocator interface */
-
-const arch_irn_ops_t arm_irn_ops = {
-	.get_op_estimated_cost  = NULL,
-	.perform_memory_operand = NULL,
-};
-
 /**
  * Transforms the standard Firm graph into an ARM firm graph.
  */
@@ -332,7 +325,7 @@ static void arm_init(void)
 	arm_mode_flags = new_non_arithmetic_mode("arm_flags", 32);
 
 	arm_register_init();
-	arm_create_opcodes(&arm_irn_ops);
+	arm_create_opcodes(&be_null_ops);
 	arm_init_backend_params();
 }
 

ir/be/arm/bearch_arm_t.h

@@ -49,8 +49,6 @@ extern arm_codegen_config_t arm_cg_config;
 extern ir_mode *arm_mode_gp;
 extern ir_mode *arm_mode_flags;
 
-extern const arch_irn_ops_t arm_irn_ops;
-
 void arm_finish_graph(ir_graph *irg);
 
 void arm_lower_64bit(void);

ir/be/benode.c

@@ -602,7 +602,7 @@ bool is_be_node(const ir_node *irn)
 	return get_op_tag(get_irn_op(irn)) == be_op_tag;
 }
 
-static const arch_irn_ops_t null_ops = {
+arch_irn_ops_t const be_null_ops = {
 	.get_op_estimated_cost  = NULL,
 	.perform_memory_operand = NULL,
 };
@@ -613,7 +613,7 @@ static ir_op *new_be_op(unsigned code, const char *name, op_pin_state p,
 	ir_op *res = new_ir_op(code, name, p, flags, opar, 0, attr_size);
 	set_op_dump(res, dump_node);
 	set_op_copy_attr(res, copy_attr);
-	res->ops.be_ops = &null_ops;
+	res->ops.be_ops = &be_null_ops;
 	set_op_tag(res, be_op_tag);
 	return res;
 }
@@ -644,7 +644,7 @@ void be_init_op(void)
 	for (unsigned opc = iro_first; opc <= iro_last; ++opc) {
 		ir_op *op = ir_get_opcode(opc);
 		assert(op->ops.be_ops == NULL);
-		op->ops.be_ops = &null_ops;
+		op->ops.be_ops = &be_null_ops;
 	}
 }
 

ir/be/benode.h

@@ -41,6 +41,8 @@ extern ir_op *op_be_Keep;
 extern ir_op *op_be_MemPerm;
 extern ir_op *op_be_Perm;
 
+extern arch_irn_ops_t const be_null_ops;
+
 /**
  * Determines if irn is a be_node.
  */

ir/be/sparc/bearch_sparc.c

@@ -121,13 +121,6 @@ static const lc_opt_table_entry_t sparc_options[] = {
 	LC_OPT_LAST
 };
 
-/* fill register allocator interface */
-
-const arch_irn_ops_t sparc_irn_ops = {
-	.get_op_estimated_cost  = NULL,
-	.perform_memory_operand = NULL,
-};
-
 /**
  * Transforms the standard firm graph into a SPARC firm graph
  */
@@ -406,7 +399,7 @@ static void sparc_init(void)
 {
 	sparc_init_asm_constraints();
 	sparc_register_init();
-	sparc_create_opcodes(&sparc_irn_ops);
+	sparc_create_opcodes(&be_null_ops);
 	sparc_cconv_init();
 	sparc_setup_cg_config();
 }

ir/be/sparc/bearch_sparc_t.h

@@ -29,8 +29,6 @@ typedef struct sparc_isa_t {
 	pmap       *constants;
 } sparc_isa_t;
 
-extern const arch_irn_ops_t sparc_irn_ops;
-
 extern ir_mode *sparc_mode_Q;
 
 /**

ir/be/sparc/sparc_lower64.c

@@ -9,6 +9,7 @@
  * @author   Matthias Braun
  */
 #include "bearch_sparc_t.h"
+#include "benode.h"
 #include "panic.h"
 #include "sparc_nodes_attr.h"
 #include "gen_sparc_new_nodes.h"
@@ -137,7 +138,7 @@ void sparc_lower_64bit(void)
 	};
 
 	/* make sure opcodes are initialized */
-	sparc_create_opcodes(&sparc_irn_ops);
+	sparc_create_opcodes(&be_null_ops);
 
 	ir_prepare_dw_lowering(&lower_dw_params);
 	ir_register_dw_lower_function(op_Add,   lower64_add);