Commit d13cb0a6 authored by Matthias Braun's avatar Matthias Braun
Browse files

ia32, amd64: Introduce common x86_addr_t struct.

We only use the immediate and scale yet on ia32.
parent 9eaaf697
......@@ -67,7 +67,7 @@ static ir_node *create_push(ir_node *node, ir_node *schedpoint, ir_node *sp,
ir_graph *irg = get_irn_irg(node);
ir_node *frame = get_irg_frame(irg);
amd64_addr_t addr = {
x86_addr_t addr = {
.immediate = {
.kind = X86_IMM_FRAMEENT,
.entity = ent,
......@@ -89,7 +89,7 @@ static ir_node *create_pop(ir_node *node, ir_node *schedpoint, ir_node *sp,
ir_graph *irg = get_irn_irg(node);
ir_node *frame = get_irg_frame(irg);
amd64_addr_t addr = {
x86_addr_t addr = {
.immediate = {
.kind = X86_IMM_FRAMEENT,
.entity = ent,
......@@ -557,7 +557,7 @@ static void introduce_prologue_epilogue(ir_graph *irg, bool omit_fp)
}
static bool node_has_sp_base(ir_node const *const node,
amd64_addr_t const *const addr)
x86_addr_t const *const addr)
{
if (!x86_addr_variant_has_base(addr->variant))
return false;
......@@ -572,7 +572,7 @@ static void amd64_determine_frameoffset(ir_node *node, int sp_offset)
|| !amd64_has_addr_attr(get_amd64_attr_const(node)->op_mode))
return;
amd64_addr_t *const addr = &get_amd64_addr_attr(node)->addr;
x86_addr_t *const addr = &get_amd64_addr_attr(node)->addr;
if (addr->immediate.kind == X86_IMM_FRAMEENT) {
addr->immediate.offset += get_entity_offset(addr->immediate.entity);
addr->immediate.entity = NULL;
......
......@@ -263,7 +263,7 @@ static void amd64_emit_immediate32(bool const prefix,
}
static void amd64_emit_addr(const ir_node *const node,
const amd64_addr_t *const addr)
const x86_addr_t *const addr)
{
int32_t const offset = addr->immediate.offset;
ir_entity *const entity = addr->immediate.entity;
......
......@@ -108,7 +108,7 @@ static void amd64_turn_back_am(ir_node *const node, arch_register_t const *const
ir_node *block = get_nodes_block(node);
amd64_addr_attr_t *attr = get_amd64_addr_attr(node);
amd64_addr_t new_addr = attr->addr;
x86_addr_t new_addr = attr->addr;
ir_node *load_in[3];
int load_arity = 0;
x86_addr_variant_t variant = attr->addr.variant;
......@@ -138,7 +138,7 @@ static void amd64_turn_back_am(ir_node *const node, arch_register_t const *const
new_in[1] = load_res;
set_irn_in(node, ARRAY_SIZE(new_in), new_in);
attr->base.op_mode = AMD64_OP_REG_REG;
attr->addr = (amd64_addr_t) {
attr->addr = (x86_addr_t) {
.base_input = 0,
.variant = X86_ADDR_REG,
};
......@@ -163,7 +163,7 @@ static bool amd64_handle_2addr(ir_node *const node, arch_register_req_t const *c
amd64_attr_t const *const attr = get_amd64_attr_const(node);
if (attr->op_mode == AMD64_OP_REG_ADDR) {
amd64_addr_t const *const addr = &get_amd64_addr_attr_const(node)->addr;
x86_addr_t const *const addr = &get_amd64_addr_attr_const(node)->addr;
if ((x86_addr_variant_has_base( addr->variant) && arch_get_irn_register_in(node, addr->base_input) == out_reg) ||
(x86_addr_variant_has_index(addr->variant) && arch_get_irn_register_in(node, addr->index_input) == out_reg)) {
amd64_turn_back_am(node, out_reg);
......
......@@ -212,16 +212,6 @@ static bool imm64s_equal(const amd64_imm64_t *const imm0,
return imm0->offset == imm1->offset && imm0->entity == imm1->entity;
}
static bool amd64_addrs_equal(const amd64_addr_t *const am0,
const amd64_addr_t *const am1)
{
return x86_imm32_equal(&am0->immediate, &am1->immediate)
&& am0->base_input == am1->base_input
&& am0->index_input == am1->index_input
&& am0->log_scale == am1->log_scale
&& am0->segment == am1->segment;
}
int amd64_attrs_equal(const ir_node *a, const ir_node *b)
{
const amd64_attr_t *attr_a = get_amd64_attr_const(a);
......@@ -234,7 +224,7 @@ int amd64_addr_attrs_equal(const ir_node *a, const ir_node *b)
const amd64_addr_attr_t *attr_a = get_amd64_addr_attr_const(a);
const amd64_addr_attr_t *attr_b = get_amd64_addr_attr_const(b);
return amd64_attrs_equal(a, b)
&& amd64_addrs_equal(&attr_a->addr, &attr_b->addr)
&& x86_addrs_equal(&attr_a->addr, &attr_b->addr)
&& attr_a->size == attr_b->size;
}
......
......@@ -33,16 +33,6 @@ typedef enum amd64_insn_size_t {
INSN_SIZE_128,
} amd64_insn_size_t;
typedef enum amd64_segment_selector_t {
AMD64_SEGMENT_DEFAULT,
AMD64_SEGMENT_CS,
AMD64_SEGMENT_SS,
AMD64_SEGMENT_DS,
AMD64_SEGMENT_ES,
AMD64_SEGMENT_FS,
AMD64_SEGMENT_GS,
} amd64_segment_selector_t;
typedef enum amd64_op_mode_t {
AMD64_OP_NONE,
AMD64_OP_ADDR,
......@@ -67,25 +57,15 @@ typedef struct amd64_imm64_t {
ENUMBF(x86_immediate_kind_t) kind : 8;
} amd64_imm64_t;
typedef struct amd64_addr_t {
x86_imm32_t immediate;
uint8_t base_input;
uint8_t index_input;
uint8_t mem_input;
unsigned log_scale : 2; /* 0, 1, 2, 3 (giving scale 1, 2, 4, 8) */
ENUMBF(amd64_segment_selector_t) segment : 3;
ENUMBF(x86_addr_variant_t) variant : 3;
} amd64_addr_t;
typedef struct amd64_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
amd64_op_mode_t op_mode;
} amd64_attr_t;
typedef struct amd64_addr_attr_t {
amd64_attr_t base;
amd64_attr_t base;
ENUMBF(amd64_insn_size_t) size : 3;
amd64_addr_t addr;
x86_addr_t addr;
} amd64_addr_attr_t;
typedef struct amd64_binop_addr_attr_t {
......
......@@ -35,7 +35,7 @@ static void peephole_amd64_lea(ir_node *const node)
arch_register_t const *const oreg = arch_get_irn_register_out(node, pn_amd64_lea_res);
amd64_addr_attr_t const *const attr = get_amd64_addr_attr_const(node);
amd64_addr_t const *const addr = &attr->addr;
x86_addr_t const *const addr = &attr->addr;
if (addr->variant == X86_ADDR_BASE) {
/* lea c(%r), %r -> add $c, %r */
ir_node *const base = get_irn_n(node, addr->base_input);
......
......@@ -132,7 +132,7 @@ my $divop = {
out_reqs => [ "rax", "flags", "mem", "rdx" ],
outs => [ "res_div", "flags", "M", "res_mod" ],
attr_type => "amd64_addr_attr_t",
fixed => "amd64_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };\n"
fixed => "x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };\n"
."amd64_op_mode_t op_mode = AMD64_OP_REG;\n",
attr => "amd64_insn_size_t size",
};
......@@ -148,7 +148,7 @@ my $mulop = {
out_reqs => [ "rax", "flags", "mem", "rdx" ],
outs => [ "res_low", "flags", "M", "res_high" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
};
my $shiftop = {
......@@ -169,7 +169,7 @@ my $unop = {
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size",
fixed => "amd64_op_mode_t op_mode = AMD64_OP_REG;\n"
."amd64_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };",
."x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };",
};
my $unop_out = {
......@@ -178,7 +178,7 @@ my $unop_out = {
out_reqs => [ "gp", "flags", "mem" ],
outs => [ "res", "flags", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
};
my $binopx = {
......@@ -207,7 +207,7 @@ my $cvtop2x = {
out_reqs => [ "xmm", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
};
my $cvtopx2i = {
......@@ -216,7 +216,7 @@ my $cvtopx2i = {
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
};
my $movopx = {
......@@ -225,7 +225,7 @@ my $movopx = {
outs => [ "res", "none", "M" ],
out_reqs => [ "xmm", "none", "mem" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_op_mode_t op_mode, x86_addr_t addr",
};
my $x87const = {
......@@ -275,7 +275,7 @@ push_am => {
out_reqs => [ "rsp:I", "mem" ],
outs => [ "stack", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_addr_t addr",
attr => "amd64_insn_size_t size, x86_addr_t addr",
fixed => "amd64_op_mode_t op_mode = AMD64_OP_ADDR;\n",
emit => "push%M %A",
},
......@@ -298,7 +298,7 @@ pop_am => {
out_reqs => [ "rsp:I", "mem" ],
outs => [ "stack", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_addr_t addr",
attr => "amd64_insn_size_t size, x86_addr_t addr",
fixed => "amd64_op_mode_t op_mode = AMD64_OP_ADDR;\n",
emit => "pop%M %A",
},
......@@ -432,7 +432,7 @@ movs => {
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "movs%Mq %AM, %^D0",
},
......@@ -442,7 +442,7 @@ mov_gp => {
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
},
ijmp => {
......@@ -452,7 +452,7 @@ ijmp => {
out_reqs => [ "exec", "none", "mem" ],
outs => [ "X", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "jmp %*AM",
},
......@@ -504,7 +504,7 @@ lea => {
outs => [ "res" ],
out_reqs => [ "gp" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_addr_t addr",
attr => "amd64_insn_size_t size, x86_addr_t addr",
fixed => "amd64_op_mode_t op_mode = AMD64_OP_ADDR;\n",
emit => "lea%M %A, %D0",
},
......@@ -538,7 +538,7 @@ jmp_switch => {
in_reqs => "...",
out_reqs => "...",
attr_type => "amd64_switch_jmp_attr_t",
attr => "amd64_op_mode_t op_mode, const amd64_addr_t *addr, const ir_switch_table *table, ir_entity *table_entity",
attr => "amd64_op_mode_t op_mode, const x86_addr_t *addr, const ir_switch_table *table, ir_entity *table_entity",
},
call => {
......@@ -586,7 +586,7 @@ divs => {
movs_xmm => {
template => $movopx,
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "movs%MX %AM, %D0",
},
......@@ -643,7 +643,7 @@ movd_xmm_gp => {
in_reqs => [ "xmm" ],
out_reqs => [ "gp" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "movd %S0, %D0"
},
......@@ -654,7 +654,7 @@ movd_gp_xmm => {
in_reqs => [ "gp" ],
out_reqs => [ "xmm" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "movd %S0, %D0"
},
......@@ -667,7 +667,7 @@ cvtss2sd => {
cvtsd2ss => {
template => $cvtop2x,
attr => "amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_op_mode_t op_mode, x86_addr_t addr",
fixed => "amd64_insn_size_t size = INSN_SIZE_64;\n",
emit => "cvtsd2ss %AM, %^D0",
},
......@@ -778,7 +778,7 @@ fld => {
out_reqs => [ "x87", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_x87_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "fld%FM %AM",
},
......@@ -790,7 +790,7 @@ fild => {
out_reqs => [ "x87", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_x87_addr_attr_t",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr",
attr => "amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr",
emit => "fild%M %AM",
},
......
......@@ -359,14 +359,14 @@ ir_entity *create_float_const_entity(ir_tarval *const tv)
return entity;
}
void init_lconst_addr(amd64_addr_t *addr, ir_entity *entity)
void init_lconst_addr(x86_addr_t *addr, ir_entity *entity)
{
assert(entity_has_definition(entity));
assert(get_entity_linkage(entity) & IR_LINKAGE_CONSTANT);
assert(get_entity_visibility(entity) == ir_visibility_private);
x86_immediate_kind_t kind = be_options.pic_style != BE_PIC_NONE
? X86_IMM_PCREL : X86_IMM_ADDR;
*addr = (amd64_addr_t) {
*addr = (x86_addr_t) {
.immediate = {
.entity = entity,
.kind = kind,
......@@ -384,7 +384,7 @@ static ir_node *create_float_const(dbg_info *dbgi, ir_node *block,
ir_node *nomem = get_irg_no_mem(irg);
ir_node *in[] = { nomem };
amd64_addr_t addr;
x86_addr_t addr;
init_lconst_addr(&addr, entity);
ir_node *load;
......@@ -437,7 +437,7 @@ static ir_node *gen_x87_Const(ir_node *const block, ir_tarval *tv)
ir_graph *irg = get_irn_irg(block);
ir_node *nomem = get_irg_no_mem(irg);
ir_node *in[1] = { nomem };
amd64_addr_t addr;
x86_addr_t addr;
init_lconst_addr(&addr, entity);
amd64_insn_size_t size = get_insn_size_from_mode(mode);
ir_node *load = new_bd_amd64_fld(NULL, block, ARRAY_SIZE(in), in,
......@@ -489,7 +489,7 @@ static ir_node *create_picaddr_lea(ir_node *const block,
x86_immediate_kind_t const kind,
ir_entity *const entity)
{
amd64_addr_t addr = {
x86_addr_t addr = {
.immediate = (x86_imm32_t) {
.kind = kind,
.entity = entity,
......@@ -534,7 +534,7 @@ ir_node *amd64_new_IncSP(ir_node *block, ir_node *old_sp, int offset,
typedef ir_node *(*construct_binop_func)(dbg_info *dbgi, ir_node *block, int arity, ir_node *const *in, arch_register_req_t const **in_reqs, amd64_binop_addr_attr_t const *attr_init);
typedef ir_node *(*construct_rax_binop_func)(dbg_info *dbgi, ir_node *block, int arity, ir_node *const *in, arch_register_req_t const **in_reqs, amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr);
typedef ir_node *(*construct_rax_binop_func)(dbg_info *dbgi, ir_node *block, int arity, ir_node *const *in, arch_register_req_t const **in_reqs, amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr);
typedef enum match_flags_t {
match_am = 1 << 0,
......@@ -686,7 +686,7 @@ static bool use_address_matching(ir_mode *mode, match_flags_t flags,
}
static void perform_address_matching(ir_node *ptr, int *arity,
ir_node **in, amd64_addr_t *addr)
ir_node **in, x86_addr_t *addr)
{
x86_address_t maddr;
memset(&maddr, 0, sizeof(maddr));
......@@ -745,7 +745,7 @@ static void match_binop(amd64_args_t *args, ir_node *block,
bool use_am
= use_address_matching(mode, flags, block, op1, op2, &load, &op);
amd64_addr_t *addr = &attr->base.addr;
x86_addr_t *addr = &attr->base.addr;
if (use_immediate && match_immediate_32(&attr->u.immediate, op2, false)) {
assert(!use_xmm && "Can't (yet) match binop with xmm immediate");
/* fine, we found an immediate */
......@@ -840,7 +840,7 @@ static ir_node *gen_binop_rax(ir_node *node, ir_node *op0, ir_node *op1,
ir_node *in[4];
int arity = 0;
amd64_op_mode_t op_mode;
amd64_addr_t addr;
x86_addr_t addr;
memset(&addr, 0, sizeof(addr));
const arch_register_req_t **reqs;
......@@ -900,7 +900,7 @@ static ir_node *gen_binop_xmm(ir_node *node, ir_node *op0, ir_node *op1,
bool use_am = use_address_matching(mode, flags, block, op0, op1, &load,
&op);
amd64_addr_t *addr = &attr->base.addr;
x86_addr_t *addr = &attr->base.addr;
if (use_am) {
int reg_input = args.arity++;
attr->u.reg_input = reg_input;
......@@ -1019,7 +1019,7 @@ static ir_node *create_add_lea(dbg_info *dbgi, ir_node *new_block,
ir_node *op2)
{
ir_node *in[] = { op1, op2 };
amd64_addr_t addr = {
x86_addr_t addr = {
.variant = X86_ADDR_BASE_INDEX,
.base_input = 0,
.index_input = 1,
......@@ -1038,7 +1038,7 @@ static ir_node *match_simple_lea(dbg_info *dbgi, ir_node *new_block,
ir_node *in[] = {
be_transform_node(op1)
};
amd64_addr_t addr = {
x86_addr_t addr = {
.immediate = immediate,
.variant = X86_ADDR_BASE,
};
......@@ -1379,7 +1379,7 @@ static ir_node *gen_unop(ir_node *const node, int op_pos, unop_constructor gen,
typedef ir_node* (*unop_out_constructor)(dbg_info*, ir_node *block, const int arity, ir_node *const *const in,
arch_register_req_t const ** const reqs,
amd64_insn_size_t size, amd64_op_mode_t opmode,
amd64_addr_t addr);
x86_addr_t addr);
static ir_node *gen_unop_out(ir_node *const node, int op_pos,
unop_out_constructor gen, unsigned pn_res)
......@@ -1394,9 +1394,9 @@ static ir_node *gen_unop_out(ir_node *const node, int op_pos,
ir_node * new_node;
if (load != NULL) {
amd64_addr_t addr;
ir_node *in[5];
int arity = 0;
x86_addr_t addr;
ir_node *in[5];
int arity = 0;
perform_address_matching(get_Load_ptr(load), &arity, in, &addr);
new_node = gen(dbgi, new_block, arity, in, gp_am_reqs[arity], size, AMD64_OP_ADDR, addr);
......@@ -1404,7 +1404,7 @@ static ir_node *gen_unop_out(ir_node *const node, int op_pos,
fix_node_mem_proj(new_node, mem_proj);
} else {
amd64_addr_t addr = {
x86_addr_t addr = {
.base_input = 0,
.variant = X86_ADDR_REG,
};
......@@ -1482,7 +1482,7 @@ static ir_node *gen_Member(ir_node *const node)
get_entity_parameter_number(entity) == IR_VA_START_PARAMETER_NUMBER)
panic("gen_Member: Request for invalid parameter (va_start parameter)");
amd64_addr_t addr = {
x86_addr_t addr = {
.immediate = {
.entity = entity,
.kind = X86_IMM_FRAMEENT,
......@@ -1504,7 +1504,7 @@ static ir_node *gen_IJmp(ir_node *const node)
int arity = 0;
ir_node *in[3];
amd64_addr_t addr;
x86_addr_t addr;
memset(&addr, 0, sizeof(addr));
const arch_register_req_t **reqs;
......@@ -1577,7 +1577,7 @@ static ir_node *gen_Switch(ir_node *const node)
amd64_op_mode_t op_mode;
int arity = 0;
ir_node *in[1];
amd64_addr_t addr;
x86_addr_t addr;
if (be_options.pic_style != BE_PIC_NONE) {
ir_node *const base
= create_picaddr_lea(new_block, X86_IMM_PCREL, entity);
......@@ -1587,7 +1587,7 @@ static ir_node *gen_Switch(ir_node *const node)
int load_index = load_arity++;
load_in[load_base] = base;
load_in[load_index] = new_sel;
addr = (amd64_addr_t) {
addr = (x86_addr_t) {
.variant = X86_ADDR_BASE_INDEX,
.base_input = load_base,
.index_input = load_index,
......@@ -1603,7 +1603,7 @@ static ir_node *gen_Switch(ir_node *const node)
base, load_res);
int const input = arity++;
addr = (amd64_addr_t) {
addr = (x86_addr_t) {
.base_input = input,
.variant = X86_ADDR_REG,
};
......@@ -1614,7 +1614,7 @@ static ir_node *gen_Switch(ir_node *const node)
int index_in = arity++;
in[index_in] = new_sel;
in_reqs = reg_reqs;
addr = (amd64_addr_t) {
addr = (x86_addr_t) {
.immediate = {
.kind = X86_IMM_ADDR,
.entity = entity,
......@@ -1782,7 +1782,7 @@ static ir_node *gen_Call(ir_node *const node)
: amd64_new_IncSP(new_block, stack, param_stacksize, false);
/* match callee */
amd64_addr_t addr;
x86_addr_t addr;
memset(&addr, 0, sizeof(addr));
amd64_op_mode_t op_mode;
......@@ -1839,7 +1839,7 @@ static ir_node *gen_Call(ir_node *const node)
goto no_call_mem;
} else {
int const input = in_arity++;
addr = (amd64_addr_t) {
addr = (x86_addr_t) {
.base_input = input,
.variant = X86_ADDR_REG,
};
......@@ -2136,7 +2136,7 @@ static ir_node *gen_Phi(ir_node *const node)
typedef ir_node* (*create_mov_func)(dbg_info *dbgi, ir_node *block, int arity,
ir_node *const *in, arch_register_req_t const **in_reqs,
amd64_insn_size_t size, amd64_op_mode_t op_mode, amd64_addr_t addr);
amd64_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr);
static ir_node *match_mov(dbg_info *dbgi, ir_node *block, ir_node *value,
amd64_insn_size_t size, create_mov_func create_mov,
......@@ -2151,7 +2151,7 @@ static ir_node *match_mov(dbg_info *dbgi, ir_node *block, ir_node *value,
value, &load, &op);
amd64_op_mode_t op_mode;
amd64_addr_t addr;
x86_addr_t addr;
const arch_register_req_t **reqs;
ir_node *mem_proj = NULL;
if (use_am) {
......@@ -2170,7 +2170,7 @@ static ir_node *match_mov(dbg_info *dbgi, ir_node *block, ir_node *value,
} else {
ir_node *new_value = be_transform_node(value);
int const input = arity++;
addr = (amd64_addr_t) {
addr = (x86_addr_t) {
.base_input = input,
.variant = X86_ADDR_REG,
};
......@@ -2215,7 +2215,7 @@ static ir_node *new_movq_wrapper(dbg_info *dbgi, ir_node *block, int arity,
ir_node *const *in,
arch_register_req_t const **in_reqs,
amd64_insn_size_t size,
amd64_op_mode_t op_mode, amd64_addr_t addr)
amd64_op_mode_t op_mode, x86_addr_t addr)
{
(void)size;
assert(size == INSN_SIZE_64);
......@@ -2232,7 +2232,7 @@ static ir_node *new_cvtsd2ss_wrapper(dbg_info *dbgi, ir_node *block, int arity,
ir_node *const *in,
arch_register_req_t const **in_reqs,
amd64_insn_size_t size,
amd64_op_mode_t op_mode, amd64_addr_t addr)
amd64_op_mode_t op_mode, x86_addr_t addr)
{
(void)size;
assert(size == INSN_SIZE_64);
......@@ -2246,7 +2246,7 @@ static ir_node *create_cvtsd2ss(dbg_info *dbgi, ir_node *block, ir_node *value)
}
static void store_to_temp(construct_binop_func const new_store,
arch_register_req_t const **const in_reqs, amd64_addr_t *addr,
arch_register_req_t const **const in_reqs, x86_addr_t *addr,
dbg_info *dbgi, ir_node *block, ir_node **in, int *n_in,
ir_node *new_op, amd64_insn_size_t size)
{
......@@ -2293,7 +2293,7 @@ static ir_node *conv_sse_to_x87(dbg_info *dbgi, ir_node *block, ir_node *op)
ir_node *const new_op = be_transform_node(op);
ir_node *in[5];
int n_in = 0;
amd64_addr_t addr;
x86_addr_t addr;
store_to_temp(new_bd_amd64_movs_store_xmm, xmm_reg_mem_reqs, &addr, dbgi,
block, in, &n_in, new_op, size);
assert(n_in < (int)ARRAY_SIZE(in));
......@@ -2311,7 +2311,7 @@ static ir_node *conv_x87_to_sse(dbg_info *dbgi, ir_node *block, ir_node *op,
ir_node *const new_op = be_transform_node(op);
ir_node *in[5];
int n_in = 0;
amd64_addr_t addr;
x86_addr_t addr;
assert(get_mode_size_bits(dst_mode) <= 64);
store_to_temp(new_bd_amd64_fst, x87_reg_mem_reqs, &addr, dbgi, block, in,
&n_in, new_op, size);
......@@ -2336,7 +2336,7 @@ static ir_node *conv_int_to_x87(dbg_info *dbgi, ir_node *block, ir_node *val)
ir_node *in[5];
int n_in = 0;
amd64_addr_t addr;
x86_addr_t addr;
store_to_temp(new_bd_amd64_mov_store, reg_reg_mem_reqs, &addr, dbgi, block,
in, &n_in, new_val, size);
assert(n_in < (int)ARRAY_SIZE(in));
......@@ -2358,7 +2358,7 @@ static ir_node *conv_x87_to_int(dbg_info *const dbgi, ir_node *const block,
ir_node *in[5];
int n_in = 0;
amd64_addr_t addr;
x86_addr_t addr;
store_to_temp(new_bd_amd64_fisttp, x87K_reg_mem_reqs, &addr, dbgi, block,
in, &n_in, new_val, insn_size_src);
assert(n_in < (int)ARRAY_SIZE(in));
......@@ -2393,9 +2393,9 @@ static ir_node *gen_Conv(ir_node *const node)
ir_node *const op_ext = gen_extend(dbgi, block, op, src_mode);
// No point in address matching here, the sign-/zero-extending mov
// has done that already.
ir_node *const in[] = { op_ext };
unsigned const n_in = ARRAY_SIZE(in);
amd64_addr_t const addr = {
ir_node *const in[] = { op_ext };