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Zwinkau
libfirm
Commits
d21131b4
Commit
d21131b4
authored
Jul 08, 2014
by
Matthias Braun
Browse files
coding style fixes: ensure space after control flow changing statements
parent
b9d5dd25
Changes
7
Hide whitespace changes
Inline
Side-by-side
ir/be/amd64/amd64_transform.c
View file @
d21131b4
...
...
@@ -701,7 +701,7 @@ static void match_binop(amd64_args_t *args, ir_node *block,
if
(
addr
->
base_input
!=
NO_INPUT
&&
addr
->
index_input
!=
NO_INPUT
)
{
args
->
reqs
=
use_xmm
?
xmm_xmm_xmm_mem_reqs
:
reg_reg_reg_mem_reqs
;
}
else
if
(
addr
->
base_input
!=
NO_INPUT
||
addr
->
index_input
!=
NO_INPUT
)
{
}
else
if
(
addr
->
base_input
!=
NO_INPUT
||
addr
->
index_input
!=
NO_INPUT
)
{
args
->
reqs
=
use_xmm
?
xmm_xmm_mem_reqs
:
reg_reg_mem_reqs
;
}
...
...
@@ -804,7 +804,7 @@ static ir_node *gen_binop_rax(ir_node *node, ir_node *op1, ir_node *op2,
reqs
=
reg_mem_reqs
;
if
(
addr
.
base_input
!=
NO_INPUT
&&
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_reg_reg_mem_reqs
;
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_reg_mem_reqs
;
}
...
...
@@ -1031,7 +1031,7 @@ static ir_node *gen_Mulh(ir_node *const node)
ir_mode
*
mode
=
get_irn_mode
(
op1
);
ir_node
*
new_node
;
if
(
mode_is_signed
(
mode
))
{
if
(
mode_is_signed
(
mode
))
{
new_node
=
gen_binop_rax
(
node
,
op1
,
op2
,
new_bd_amd64_IMul1Op
,
/* match_am TODO */
match_mode_neutral
|
match_commutative
);
...
...
@@ -1281,7 +1281,7 @@ static ir_node *gen_IJmp(ir_node *node)
reqs
=
mem_reqs
;
if
(
addr
.
base_input
!=
NO_INPUT
&&
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_reg_mem_reqs
;
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_mem_reqs
;
}
ir_node
*
load_mem
=
get_Load_mem
(
load
);
...
...
@@ -2049,7 +2049,7 @@ static ir_node *gen_Conv(ir_node *node)
}
else
if
(
!
src_float
&&
dst_float
)
{
/* integer to fp */
if
(
!
mode_is_signed
(
src_mode
)
&&
src_bits
<=
32
)
{
if
(
!
mode_is_signed
(
src_mode
)
&&
src_bits
<=
32
)
{
/* Conversion is signed only, therefore use up to 64-bit register
* size and require that the upper bits are zero. This is done with
* an explicit move instruction */
...
...
@@ -2234,7 +2234,7 @@ static ir_node *gen_Load(ir_node *node)
const
arch_register_req_t
**
reqs
=
mem_reqs
;
if
(
addr
.
base_input
!=
NO_INPUT
&&
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_reg_mem_reqs
;
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
}
else
if
(
addr
.
base_input
!=
NO_INPUT
||
addr
.
index_input
!=
NO_INPUT
)
{
reqs
=
reg_mem_reqs
;
}
...
...
ir/be/amd64/bearch_amd64.c
View file @
d21131b4
...
...
@@ -355,7 +355,7 @@ static ir_node *create_conv_const(ir_graph *irg, ir_mode *src_mode)
assert
(
mode_is_float
(
src_mode
));
ir_node
*
result
=
NULL
;
if
(
get_mode_size_bits
(
src_mode
)
==
32
)
{
if
(
get_mode_size_bits
(
src_mode
)
==
32
)
{
double
fconst
=
1593835520
;
ir_tarval
*
tv
=
new_tarval_from_double
(
fconst
,
src_mode
);
result
=
new_r_Const
(
irg
,
tv
);
...
...
@@ -538,7 +538,7 @@ static void introduce_epilogue(ir_node *ret)
ir_node
*
curr_sp
=
first_sp
;
ir_mode
*
mode_gp
=
mode_Lu
;
if
(
!
layout
->
sp_relative
)
{
if
(
!
layout
->
sp_relative
)
{
int
n_rbp
=
determine_rbp_input
(
ret
);
ir_node
*
curr_bp
=
get_irn_n
(
ret
,
n_rbp
);
...
...
ir/be/begnuas.c
View file @
d21131b4
...
...
@@ -192,7 +192,7 @@ static void emit_section(be_gas_section_t section, const ir_entity *entity)
if
(
be_gas_object_file_format
==
OBJECT_FILE_FORMAT_MACH_O
)
{
emit_section_macho
(
section
);
return
;
}
else
if
(
be_gas_elf_variant
==
ELF_VARIANT_SPARC
)
{
}
else
if
(
be_gas_elf_variant
==
ELF_VARIANT_SPARC
)
{
emit_section_sparc
(
section
,
entity
);
return
;
}
...
...
ir/be/beifg.h
View file @
d21131b4
...
...
@@ -69,9 +69,9 @@ int be_ifg_degree(const be_ifg_t *ifg, const ir_node *irn);
for (ir_node *pos; (pos = be_ifg_nodes_next(&pos##__iter));)
#define be_ifg_foreach_clique(ifg, iter, buf, count) \
for(*(count) = be_ifg_cliques_begin(ifg, iter, buf); \
*(count) != -1 ; \
*(count) = be_ifg_cliques_next(iter))
for
(*(count) = be_ifg_cliques_begin(ifg, iter, buf); \
*(count) != -1 ; \
*(count) = be_ifg_cliques_next(iter))
typedef
struct
{
int
n_nodes
;
...
...
ir/be/beintlive_t.h
View file @
d21131b4
...
...
@@ -52,7 +52,7 @@ static inline int value_dominates(const ir_node *a, const ir_node *b)
* a and b are not in the same block,
* so dominance is determined by the dominance of the blocks.
*/
if
(
block_a
!=
block_b
)
{
if
(
block_a
!=
block_b
)
{
return
block_dominates
(
block_a
,
block_b
);
}
...
...
ir/be/bepbqpcoloring.c
View file @
d21131b4
...
...
@@ -349,7 +349,7 @@ static void create_pbqp_coloring_instance(ir_node *block, void *data)
/* insert pbqp node into temp rpeo list of this block */
plist_insert_front
(
temp_list
,
get_node
(
pbqp_inst
,
get_irn_idx
(
proj
)));
if
(
is_Perm_Proj
(
proj
))
{
if
(
is_Perm_Proj
(
proj
))
{
/* add proj to clique */
pbqp_node
*
clique_member
=
get_node
(
pbqp_inst
,
proj
->
node_idx
);
vector
*
costs
=
clique_member
->
costs
;
...
...
@@ -357,8 +357,8 @@ static void create_pbqp_coloring_instance(ir_node *block, void *data)
clique
[
clique_size
]
=
clique_member
;
for
(
idx
=
0
;
idx
<
costs
->
len
;
idx
++
)
{
if
(
costs
->
entries
[
idx
].
data
!=
INF_COSTS
)
{
for
(
idx
=
0
;
idx
<
costs
->
len
;
idx
++
)
{
if
(
costs
->
entries
[
idx
].
data
!=
INF_COSTS
)
{
bipartite_add
(
bp
,
clique_size
,
idx
);
}
}
...
...
@@ -369,38 +369,38 @@ static void create_pbqp_coloring_instance(ir_node *block, void *data)
}
}
if
(
clique_size
>
0
)
{
if
(
clique_size
>
0
)
{
foreach_plist
(
temp_list
,
listElement
)
{
pbqp_node
*
clique_candidate
=
listElement
->
data
;
unsigned
idx
=
0
;
bool
isMember
=
true
;
/* clique size not bigger then register class size */
if
(
clique_size
>=
cls
->
n_regs
)
break
;
if
(
clique_size
>=
cls
->
n_regs
)
break
;
for
(
idx
=
0
;
idx
<
clique_size
;
idx
++
)
{
for
(
idx
=
0
;
idx
<
clique_size
;
idx
++
)
{
pbqp_node
*
member
=
clique
[
idx
];
if
(
member
==
clique_candidate
)
{
if
(
member
==
clique_candidate
)
{
isMember
=
false
;
break
;
}
if
(
get_edge
(
pbqp_inst
,
member
->
index
,
clique_candidate
->
index
)
==
NULL
&&
get_edge
(
pbqp_inst
,
clique_candidate
->
index
,
member
->
index
)
==
NULL
)
{
if
(
get_edge
(
pbqp_inst
,
member
->
index
,
clique_candidate
->
index
)
==
NULL
&&
get_edge
(
pbqp_inst
,
clique_candidate
->
index
,
member
->
index
)
==
NULL
)
{
isMember
=
false
;
break
;
}
}
/* goto next list element if current node is not a member of the clique */
if
(
!
isMember
)
{
continue
;
}
if
(
!
isMember
)
{
continue
;
}
/* add candidate to clique */
clique
[
clique_size
]
=
clique_candidate
;
vector
*
costs
=
clique_candidate
->
costs
;
for
(
idx
=
0
;
idx
<
costs
->
len
;
idx
++
)
{
if
(
costs
->
entries
[
idx
].
data
!=
INF_COSTS
)
{
for
(
idx
=
0
;
idx
<
costs
->
len
;
idx
++
)
{
if
(
costs
->
entries
[
idx
].
data
!=
INF_COSTS
)
{
bipartite_add
(
bp
,
clique_size
,
idx
);
}
}
...
...
@@ -415,11 +415,11 @@ static void create_pbqp_coloring_instance(ir_node *block, void *data)
/* assign colors */
unsigned
nodeIdx
=
0
;
for
(
nodeIdx
=
0
;
nodeIdx
<
clique_size
;
nodeIdx
++
)
{
for
(
nodeIdx
=
0
;
nodeIdx
<
clique_size
;
nodeIdx
++
)
{
vector
*
costs
=
clique
[
nodeIdx
]
->
costs
;
int
idx
;
for
(
idx
=
0
;
idx
<
(
int
)
costs
->
len
;
idx
++
)
{
if
(
assignment
[
nodeIdx
]
!=
idx
)
{
for
(
idx
=
0
;
idx
<
(
int
)
costs
->
len
;
idx
++
)
{
if
(
assignment
[
nodeIdx
]
!=
idx
)
{
costs
->
entries
[
idx
].
data
=
INF_COSTS
;
}
}
...
...
@@ -450,16 +450,16 @@ static void create_pbqp_coloring_instance(ir_node *block, void *data)
}
/* skip last step if there is no last_element */
if
(
last_element
==
NULL
)
if
(
last_element
==
NULL
)
continue
;
/* check if proj has an if edge to last_element (at this time pbqp contains only if edges) */
if
(
get_edge
(
pbqp_inst
,
proj
->
node_idx
,
last_element
->
node_idx
)
==
NULL
&&
get_edge
(
pbqp_inst
,
last_element
->
node_idx
,
proj
->
node_idx
)
==
NULL
)
{
if
(
get_edge
(
pbqp_inst
,
proj
->
node_idx
,
last_element
->
node_idx
)
==
NULL
&&
get_edge
(
pbqp_inst
,
last_element
->
node_idx
,
proj
->
node_idx
)
==
NULL
)
{
allHaveIFEdges
=
false
;
/* there is no if edge between proj and last_element */
}
}
if
(
last_element
!=
NULL
&&
allHaveIFEdges
)
{
if
(
last_element
!=
NULL
&&
allHaveIFEdges
)
{
if
(
get_free_regs
(
restr_nodes
,
cls
,
last_element
)
<=
4
)
{
pqueue_put
(
restr_nodes_queue
,
last_element
,
pbqp_alloc_env
->
ife_edge_num
[
get_irn_idx
(
last_element
)]);
}
else
{
...
...
@@ -643,7 +643,7 @@ static void be_pbqp_coloring(be_chordal_env_t *env)
#if TIMER
ir_timer_reset_and_start
(
t_ra_pbqp_alloc_solve
);
#endif
if
(
use_late_decision
)
{
if
(
use_late_decision
)
{
solve_pbqp_heuristical_co_ld
(
pbqp_alloc_env
.
pbqp_inst
,
pbqp_alloc_env
.
rpeo
);
}
else
{
solve_pbqp_heuristical_co
(
pbqp_alloc_env
.
pbqp_inst
,
pbqp_alloc_env
.
rpeo
);
...
...
ir/be/besched.c
View file @
d21131b4
...
...
@@ -53,7 +53,7 @@ static inline void sched_set_time_stamp(const ir_node *irn)
* else we have to compute our time step from our
* neighbours.
*/
if
(
before_ts
>=
after_ts
)
{
if
(
before_ts
>=
after_ts
)
{
info
->
time_step
=
before_ts
+
SCHED_INITIAL_GRANULARITY
;
/* overflow? */
if
(
info
->
time_step
<=
before_ts
)
{
...
...
@@ -66,7 +66,7 @@ static inline void sched_set_time_stamp(const ir_node *irn)
* If the resolution went out, we have to renumber
* this block.
*/
if
(
ts
==
before_ts
||
ts
==
after_ts
)
if
(
ts
==
before_ts
||
ts
==
after_ts
)
sched_renumber
(
get_nodes_block
(
irn
));
else
info
->
time_step
=
ts
;
...
...
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