Commit d9ba33a4 authored by Matthias Braun's avatar Matthias Braun
Browse files

a bunch of fixes to make firm work with NDEBUG and without DEBUG_libfirm

parent 85052d26
......@@ -299,7 +299,9 @@ void TEMPLATE_transform_node(ir_node *node, void *env) {
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
#ifdef DEBUG_libfirm
tenv.mod = cgenv->mod;
#endif
tenv.mode = get_irn_mode(node);
#define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
......
......@@ -961,12 +961,9 @@ static int check_dependence(ir_node *curr, ir_node *tgt, ir_node *bl)
*/
static int dependent_on(ir_node *n1, ir_node *n2)
{
ir_node *bl = get_nodes_block(n1);
assert(bl == get_nodes_block(n2));
assert(get_nodes_block(n1) == get_nodes_block(n2));
return heights_reachable_in_block(ir_heights, n1, n2);
//return check_dependence(n1, n2, bl);
}
static int cmp_call_dependecy(const void *c1, const void *c2)
......
......@@ -578,9 +578,16 @@ void list_sched(const be_irg_t *birg, be_options_t *be_opts)
memcpy(&sel, trivial_selector, sizeof(sel));
}
/* Assure, that the out edges are computed */
#if 1
/* Matze: This is very slow, we should avoid it to improve backend speed,
* we just have to make sure that we have no dangling out-edges at this
* point...
*/
/* Assure, that we have no dangling out-edges to deleted stuff */
edges_deactivate(birg->irg);
edges_activate(birg->irg);
#endif
switch (list_sched_options.prep) {
case BE_SCHED_PREP_MRIS:
......
......@@ -16,6 +16,7 @@
#include "irnode.h"
#include "irtools.h"
#include "irloop_t.h"
#include "error.h"
#include "bearch.h"
#include "belive.h"
......@@ -110,7 +111,7 @@ static unsigned be_compute_loop_pressure(be_loopana_t *loop_ana, ir_loop *loop,
son_pressure = be_compute_loop_pressure(loop_ana, elem.son, cls);
break;
default:
assert(0);
panic("Unknown element found in loop");
break;
}
......
......@@ -250,12 +250,9 @@ static ir_node *get_reload_insertion_point(ir_node *block, int pos) {
}
if(!is_cfop(last)) {
ir_graph *irg = get_irn_irg(block);
ir_node *startblock = get_irg_start_block(irg);
last = sched_next(last);
// last node must be a cfop, only exception is the start block
assert(last == startblock);
assert(last == get_irg_start_block(get_irn_irg(block)));
}
// add the reload before the (cond-)jump
......
......@@ -194,19 +194,21 @@ unsigned get_num_reachable_nodes(ir_graph *irg) {
* Sets all node inputs to BAD node.
*/
void be_kill_node(ir_node *irn) {
int i, first;
ir_graph *irg;
ir_graph *irg = get_irn_irg(irn);
assert(!is_Bad(irn));
DEBUG_ONLY(
irg = get_irn_irg(irn);
#ifdef DEBUG_libfirm
{
int i, first;
first = 0 - ! is_Block(irn);
for (i = get_irn_arity(irn) - 1; i >= first; --i) {
set_irn_n(irn, i, get_irg_bad(irg));
}
)
}
#endif
edges_node_deleted(irn, irg);
}
......
......@@ -29,6 +29,7 @@
#include "irgmod.h"
#include "irgopt.h"
#include "irbitset.h"
#include "irgopt.h"
#include "pdeq.h"
#include "pset.h"
#include "debug.h"
......@@ -1005,11 +1006,12 @@ static void ia32_prepare_graph(void *self) {
FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.transform");
/* 1st: transform psi condition trees */
/* transform psi condition trees */
ia32_pre_transform_phase(cg);
/* 2nd: transform all remaining nodes */
/* transform all remaining nodes */
ia32_transform_graph(cg);
// Matze: disabled for now. Because after transformation start block has no
// self-loop anymore so it might be merged with its successor block. This
// will bring several nodes to the startblock which sometimes get scheduled
......@@ -1019,10 +1021,13 @@ static void ia32_prepare_graph(void *self) {
if (cg->dump)
be_dump(cg->irg, "-transformed", dump_ir_block_graph_sched);
/* 3rd: optimize address mode */
/* optimize address mode */
FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.am");
ia32_optimize_addressmode(cg);
/* do code placement, to optimize the position of constants */
place_code(cg->irg);
if (cg->dump)
be_dump(cg->irg, "-am", dump_ir_block_graph_sched);
......
......@@ -120,8 +120,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
*/
static ident *get_ident_for_tv(tarval *tv) {
char buf[256];
int len = tarval_snprintf(buf, sizeof(buf), tv);
assert(len);
tarval_snprintf(buf, sizeof(buf), tv);
return new_id_from_str(buf);
}
......@@ -1601,7 +1600,6 @@ static void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
* Emits code for Constant loading.
*/
static void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
ir_mode *mode = get_irn_mode(node);
ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
if (imm_tp == ia32_ImmSymConst) {
......@@ -1611,7 +1609,7 @@ static void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
ia32_emit_dest_register(env, node, 0);
} else {
tarval *tv = get_ia32_Immop_tarval(node);
assert(mode == mode_Iu);
assert(get_irn_mode(node) == mode_Iu);
/* beware: in some rare cases mode is mode_b which has no tarval_null() */
if (tarval_is_null(tv)) {
if (env->isa->opt_arch == arch_pentium_4) {
......
......@@ -14,6 +14,7 @@
#include "irgwalk.h"
#include "iredges.h"
#include "pdeq.h"
#include "error.h"
#include "../bearch.h"
#include "../besched_t.h"
......@@ -403,7 +404,7 @@ static void fix_am_source(ir_node *irn, void *env) {
pnres = pn_ia32_xLoad_res;
}
else {
assert(0 && "cannot turn back address mode for this register class");
panic("cannot turn back address mode for this register class");
}
/* copy address mode information to load */
......
......@@ -1477,8 +1477,10 @@ static void optimize_am(ir_node *irn, void *env) {
void ia32_optimize_addressmode(ia32_code_gen_t *cg) {
/* if we are supposed to do AM or LEA optimization: recalculate edges */
if (cg->opt & (IA32_OPT_DOAM | IA32_OPT_LEA)) {
#if 0
edges_deactivate(cg->irg);
edges_activate(cg->irg);
#endif
}
else {
/* no optimizations at all */
......
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