Commit e61600dd authored by Christoph Mallon's avatar Christoph Mallon
Browse files

amd64: Replace AMD64_OP_RAX_REG by AMD64_OP_REG.

parent c9aa611e
......@@ -374,12 +374,6 @@ static void amd64_emit_am(const ir_node *const node, bool indirect_star)
amd64_emit_immediate32(false, &attr->addr.immediate);
return;
case AMD64_OP_RAX_REG: {
const arch_register_t *reg = arch_get_irn_register_in(node, 1);
emit_register_mode(reg, attr->insn_mode);
return;
}
case AMD64_OP_IMM32:
case AMD64_OP_IMM64:
case AMD64_OP_NONE:
......
......@@ -38,7 +38,6 @@ static const char *get_op_mode_string(amd64_op_mode_t mode)
case AMD64_OP_IMM32: return "imm32";
case AMD64_OP_IMM64: return "imm64";
case AMD64_OP_NONE: return "none";
case AMD64_OP_RAX_REG: return "rax_reg";
case AMD64_OP_REG_ADDR: return "reg+addr";
case AMD64_OP_REG_IMM: return "reg+imm";
case AMD64_OP_REG_REG: return "reg+reg";
......
......@@ -42,8 +42,7 @@ static inline bool amd64_has_addr_attr(const ir_node *node)
|| attr->op_mode == AMD64_OP_ADDR
|| attr->op_mode == AMD64_OP_REG
|| attr->op_mode == AMD64_OP_UNOP_IMM32
|| attr->op_mode == AMD64_OP_UNOP_REG
|| attr->op_mode == AMD64_OP_RAX_REG)
|| attr->op_mode == AMD64_OP_UNOP_REG)
&& !is_amd64_xor_0(node)
&& !is_amd64_xorpd_0(node);
}
......
......@@ -55,9 +55,6 @@ typedef enum {
AMD64_OP_UNOP_IMM32,
AMD64_OP_SHIFT_REG,
AMD64_OP_SHIFT_IMM,
/** A binary operation with 1 operand being RAX (which is usually not
* explicitly given in the assembly) */
AMD64_OP_RAX_REG,
} amd64_op_mode_t;
enum {
......
......@@ -105,7 +105,7 @@ my $divop = {
outs => [ "res_div", "flags", "M", "res_mod" ],
attr_type => "amd64_addr_attr_t",
fixed => "amd64_addr_t addr = { { NULL, 0, X86_IMM_VALUE }, NO_INPUT, NO_INPUT, NO_INPUT, 0, AMD64_SEGMENT_DEFAULT };\n"
."amd64_op_mode_t op_mode = AMD64_OP_RAX_REG;\n",
."amd64_op_mode_t op_mode = AMD64_OP_REG;\n",
attr => "amd64_insn_mode_t insn_mode",
};
......
......@@ -193,14 +193,14 @@ static const arch_register_req_t *reg_reg_reqs[] = {
&amd64_class_reg_req_gp,
};
static const arch_register_req_t *rax_reg_reqs[] = {
&amd64_single_reg_req_gp_rax,
static const arch_register_req_t *reg_rax_reqs[] = {
&amd64_class_reg_req_gp,
&amd64_single_reg_req_gp_rax,
};
static const arch_register_req_t *rax_reg_rdx_mem_reqs[] = {
&amd64_single_reg_req_gp_rax,
static const arch_register_req_t *reg_rax_rdx_mem_reqs[] = {
&amd64_class_reg_req_gp,
&amd64_single_reg_req_gp_rax,
&amd64_single_reg_req_gp_rdx,
&arch_memory_requirement,
};
......@@ -781,8 +781,8 @@ static ir_node *gen_binop_rax(ir_node *node, ir_node *op1, ir_node *op2,
/* simply transform the arguments */
in[arity++] = be_transform_node(op1);
in[arity++] = be_transform_node(op2);
reqs = rax_reg_reqs;
op_mode = AMD64_OP_RAX_REG;
reqs = reg_rax_reqs;
op_mode = AMD64_OP_REG;
}
assert((size_t)arity <= ARRAY_SIZE(in));
......@@ -1109,9 +1109,9 @@ static ir_node *create_div(ir_node *const node, ir_mode *const mode,
constructor = new_bd_amd64_div;
}
ir_node *in[] = { new_op1, new_op2, upper_value, new_mem };
ir_node *res = constructor(dbgi, new_block, ARRAY_SIZE(in), in, insn_mode);
arch_set_irn_register_reqs_in(res, rax_reg_rdx_mem_reqs);
ir_node *const in[] = { new_op2, new_op1, upper_value, new_mem };
ir_node *const res = constructor(dbgi, new_block, ARRAY_SIZE(in), in, insn_mode);
arch_set_irn_register_reqs_in(res, reg_rax_rdx_mem_reqs);
return res;
}
......
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