Commit eac0962d authored by Matthias Braun's avatar Matthias Braun
Browse files

be: rename arch_irn_flags_XXX to arch_irn_flag_XXX

As they were just a single flag the name should reflect that. I did not
change arch_irn_flags_none, as that is not about a single flag.
parent 96511691
......@@ -56,7 +56,7 @@ sub amd64_custom_init_attr {
my $res = "";
if(defined($node->{modified_flags})) {
$res .= "\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n";
$res .= "\tarch_add_irn_flags(res, arch_irn_flag_modify_flags);\n";
}
return $res;
}
......
......@@ -237,7 +237,7 @@ static ir_node *gen_Switch(ir_node *node)
static ir_node *gen_be_Call(ir_node *node)
{
ir_node *res = be_duplicate_node(node);
arch_add_irn_flags(res, arch_irn_flags_modify_flags);
arch_add_irn_flags(res, arch_irn_flag_modify_flags);
return res;
}
......
......@@ -285,12 +285,12 @@ Clz => {
# pointers
LinkMovPC => {
state => "exc_pinned",
irn_flags => [ "modify_flags" ],
arity => "variable",
out_arity => "variable",
attr_type => "arm_shifter_operand_t",
attr => "arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot",
custominit => "init_arm_shifter_operand(res, immediate_value, shift_modifier, immediate_rot);\n".
"\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);",
custominit => "init_arm_shifter_operand(res, immediate_value, shift_modifier, immediate_rot);\n",
emit => "mov lr, pc\n".
"mov pc, %O",
},
......@@ -299,22 +299,22 @@ LinkMovPC => {
# pointers
LinkLdrPC => {
state => "exc_pinned",
irn_flags => [ "modify_flags" ],
arity => "variable",
out_arity => "variable",
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
custominit => "arch_add_irn_flags(res, arch_irn_flags_modify_flags);",
emit => "mov lr, pc\n".
"ldr pc, %O",
},
Bl => {
state => "exc_pinned",
irn_flags => [ "modify_flags" ],
arity => "variable",
out_arity => "variable",
attr_type => "arm_SymConst_attr_t",
attr => "ir_entity *entity, int symconst_offset",
custominit => "arch_add_irn_flags(res, arch_irn_flags_modify_flags);",
emit => 'bl %I',
},
......
......@@ -25,19 +25,19 @@ typedef struct arch_env_t arch_env_t;
* Some flags describing a node in more detail.
*/
typedef enum arch_irn_flags_t {
arch_irn_flags_none = 0, /**< Node flags. */
arch_irn_flags_dont_spill = 1U << 0, /**< This must not be spilled. */
arch_irn_flags_rematerializable = 1U << 1, /**< This can be replicated instead of spilled/reloaded. */
arch_irn_flags_modify_flags = 1U << 2, /**< I modify flags, used by the
default check_modifies
implementation in beflags */
arch_irn_flags_simple_jump = 1U << 3, /**< a simple jump instruction */
arch_irn_flags_not_scheduled = 1U << 4, /**< node must not be scheduled*/
arch_irn_flags_none = 0, /**< No flags. */
arch_irn_flag_dont_spill = 1U << 0, /**< This must not be spilled. */
arch_irn_flag_rematerializable = 1U << 1, /**< This can be replicated instead of spilled/reloaded. */
arch_irn_flag_modify_flags = 1U << 2, /**< I modify flags, used by the
default check_modifies
implementation in beflags */
arch_irn_flag_simple_jump = 1U << 3, /**< a simple jump instruction */
arch_irn_flag_not_scheduled = 1U << 4, /**< node must not be scheduled*/
/** node writes to a spillslot, this means we can load from the spillslot
* anytime (important when deciding wether we can rematerialize) */
arch_irn_flags_spill = 1U << 5,
arch_irn_flags_backend = 1U << 6, /**< begin of custom backend
flags */
arch_irn_flag_spill = 1U << 5,
arch_irn_flag_backend = 1U << 6, /**< begin of custom backend
flags */
} arch_irn_flags_t;
ENUM_BITSET(arch_irn_flags_t)
......
......@@ -245,19 +245,19 @@ void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
if (flags == arch_irn_flags_none) {
fprintf(F, " none");
} else {
if (flags & arch_irn_flags_dont_spill) {
if (flags & arch_irn_flag_dont_spill) {
fprintf(F, " unspillable");
}
if (flags & arch_irn_flags_rematerializable) {
if (flags & arch_irn_flag_rematerializable) {
fprintf(F, " remat");
}
if (flags & arch_irn_flags_modify_flags) {
if (flags & arch_irn_flag_modify_flags) {
fprintf(F, " modify_flags");
}
if (flags & arch_irn_flags_simple_jump) {
if (flags & arch_irn_flag_simple_jump) {
fprintf(F, " simple_jump");
}
if (flags & arch_irn_flags_not_scheduled) {
if (flags & arch_irn_flag_not_scheduled) {
fprintf(F, " not_scheduled");
}
}
......
......@@ -187,7 +187,7 @@ static inline arch_irn_flags_t arch_get_irn_flags(const ir_node *node)
void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags);
void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags);
#define arch_irn_is(irn, flag) ((arch_get_irn_flags(irn) & arch_irn_flags_ ## flag) != 0)
#define arch_irn_is(irn, flag) ((arch_get_irn_flags(irn) & arch_irn_flag_ ## flag) != 0)
static inline unsigned arch_get_irn_n_outs(const ir_node *node)
{
......
......@@ -14,7 +14,7 @@
* Flags are modeled as register classes with ignore registers. However to avoid
* bloating the graph, only flag-consumer -> producer dependencies are
* explicitely modeled in the graph. Nodes that just change the flags are only
* marked with the arch_irn_flags_modify_flags flag.
* marked with the arch_irn_flag_modify_flags flag.
*
* Flags are usually a limited resource that can't (or at least shouldn't) be
* spilled. So in some situations (for example 2 adc-nodes that use the flags of
......
......@@ -53,7 +53,7 @@ void be_info_new_node(ir_graph *irg, ir_node *node)
case iro_Bad:
case iro_End:
case iro_Unknown:
info->flags |= arch_irn_flags_not_scheduled;
info->flags |= arch_irn_flag_not_scheduled;
/* FALLTHROUGH */
case iro_Phi:
info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, 1);
......
......@@ -148,7 +148,7 @@ static void remove_empty_block(ir_node *block)
sched_foreach(block, node) {
if (! is_Jmp(node)
&& !(arch_get_irn_flags(node) & arch_irn_flags_simple_jump))
&& !(arch_get_irn_flags(node) & arch_irn_flag_simple_jump))
goto check_preds;
if (jump != NULL) {
/* we should never have 2 jumps in a block */
......
......@@ -92,7 +92,7 @@ static void add_to_sched(block_sched_env_t *env, ir_node *irn);
static void node_ready(block_sched_env_t *env, ir_node *pred, ir_node *irn)
{
if (is_Proj(irn)
|| (arch_get_irn_flags(irn) & arch_irn_flags_not_scheduled)) {
|| (arch_get_irn_flags(irn) & arch_irn_flag_not_scheduled)) {
selected(env, irn);
DB((dbg, LEVEL_3, "\tmaking immediately available: %+F\n", irn));
} else if (be_is_Keep(irn) || be_is_CopyKeep(irn)) {
......@@ -169,7 +169,7 @@ static void selected(block_sched_env_t *env, ir_node *node)
*/
static void add_to_sched(block_sched_env_t *env, ir_node *irn)
{
assert(! (arch_get_irn_flags(irn) & arch_irn_flags_not_scheduled));
assert(! (arch_get_irn_flags(irn) & arch_irn_flag_not_scheduled));
sched_add_before(env->block, irn);
......
......@@ -395,7 +395,7 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different,
cpy = find_copy(skip_Proj(irn), other_different);
if (! cpy) {
cpy = be_new_Copy(block, other_different);
arch_set_irn_flags(cpy, arch_irn_flags_dont_spill);
arch_set_irn_flags(cpy, arch_irn_flag_dont_spill);
DB((dbg_constr, LEVEL_1, "created non-spillable %+F for value %+F\n", cpy, other_different));
} else {
DB((dbg_constr, LEVEL_1, "using already existing %+F for value %+F\n", cpy, other_different));
......
......@@ -259,7 +259,7 @@ ir_node *be_new_Spill(const arch_register_class_t *cls,
be_node_set_reg_class_in(res, n_be_Spill_frame, cls_frame);
be_node_set_reg_class_in(res, n_be_Spill_val, cls);
arch_set_irn_register_req_out(res, 0, arch_no_register_req);
arch_add_irn_flags(res, arch_irn_flags_spill);
arch_add_irn_flags(res, arch_irn_flag_spill);
return res;
}
......@@ -281,7 +281,7 @@ ir_node *be_new_Reload(const arch_register_class_t *cls,
be_node_set_reg_class_out(res, 0, cls);
be_node_set_reg_class_in(res, n_be_Reload_frame, cls_frame);
arch_set_irn_flags(res, arch_irn_flags_rematerializable);
arch_set_irn_flags(res, arch_irn_flag_rematerializable);
a = (be_frame_attr_t*) get_irn_generic_attr(res);
a->ent = NULL;
......
......@@ -561,7 +561,7 @@ static bool try_optimistic_split(ir_node *to_split, ir_node *before,
* (so we don't split away the values produced because of
* must_be_different constraints) */
ir_node *original_insn = skip_Proj(info->original_value);
if (arch_get_irn_flags(original_insn) & arch_irn_flags_dont_spill)
if (arch_get_irn_flags(original_insn) & arch_irn_flag_dont_spill)
return false;
const arch_register_t *from_reg = arch_get_irn_register(to_split);
......
......@@ -187,7 +187,7 @@ static inline int reg_pr_costs(reg_pressure_selector_env_t *env, ir_node *irn)
ir_node *op = get_irn_n(irn, i);
if (is_Proj(op)
|| (arch_get_irn_flags(op) & arch_irn_flags_not_scheduled))
|| (arch_get_irn_flags(op) & arch_irn_flag_not_scheduled))
continue;
sum += compute_max_hops(env, op);
......
......@@ -275,7 +275,7 @@ static unsigned get_distance(ir_node *from, const ir_node *def,
return USES_INFINITY;
/* We have to keep nonspillable nodes in the workingset */
if (arch_get_irn_flags(skip_Proj_const(def)) & arch_irn_flags_dont_spill)
if (arch_get_irn_flags(skip_Proj_const(def)) & arch_irn_flag_dont_spill)
return 0;
/* give some bonus to rematerialisable nodes */
......@@ -440,7 +440,7 @@ static loc_t to_take_or_not_to_take(ir_node* first, ir_node *node,
loc.spilled = false;
/* We have to keep nonspillable nodes in the workingset */
if (arch_get_irn_flags(skip_Proj_const(node)) & arch_irn_flags_dont_spill) {
if (arch_get_irn_flags(skip_Proj_const(node)) & arch_irn_flag_dont_spill) {
loc.time = 0;
DB((dbg, DBG_START, " %+F taken (dontspill node)\n", node, loc.time));
return loc;
......
......@@ -161,8 +161,8 @@ static void verify_schedule_walker(ir_node *block, void *data)
}
last_timestep = timestep;
if (arch_get_irn_flags(node) & arch_irn_flags_not_scheduled) {
ir_fprintf(stderr, "Verify warning: flags_not_scheduled node %+F scheduled anyway\n", node);
if (arch_get_irn_flags(node) & arch_irn_flag_not_scheduled) {
ir_fprintf(stderr, "Verify warning: flag_not_scheduled node %+F scheduled anyway\n", node);
env->problem_found = true;
}
......@@ -254,7 +254,7 @@ static void verify_schedule_walker(ir_node *block, void *data)
static void check_schedule(ir_node *node, void *data)
{
be_verify_schedule_env_t *env = (be_verify_schedule_env_t*)data;
bool should_be = !is_Proj(node) && !(arch_get_irn_flags(node) & arch_irn_flags_not_scheduled);
bool should_be = !is_Proj(node) && !(arch_get_irn_flags(node) & arch_irn_flag_not_scheduled);
bool scheduled = bitset_is_set(env->scheduled, get_irn_idx(node));
if (should_be != scheduled) {
......
......@@ -77,7 +77,7 @@ sub ia32_custom_init_attr {
my $res = "";
if(defined($node->{modified_flags})) {
$res .= "\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n";
$res .= "\tarch_add_irn_flags(res, arch_irn_flag_modify_flags);\n";
}
if(defined($node->{am})) {
my $am = $node->{am};
......@@ -797,7 +797,7 @@ Setcc => {
# (when we emit the setX; setp; orb and the setX;setnp;andb sequences)
init_attr => "set_ia32_ls_mode(res, mode_Bu);\n"
. "\tif (condition_code & ia32_cc_additional_float_cases) {\n"
. "\t\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n"
. "\t\tarch_add_irn_flags(res, arch_irn_flag_modify_flags);\n"
. "\t\t/* attr->latency = 3; */\n"
. "\t}\n",
latency => 1,
......
......@@ -274,7 +274,7 @@ static ir_node *gen_Const(ir_node *node)
mode);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_sc(load, floatent);
arch_add_irn_flags(load, arch_irn_flags_rematerializable);
arch_add_irn_flags(load, arch_irn_flag_rematerializable);
res = new_r_Proj(load, mode_xmm, pn_ia32_xLoad_res);
}
} else {
......@@ -295,7 +295,7 @@ static ir_node *gen_Const(ir_node *node)
ls_mode);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_sc(load, floatent);
arch_add_irn_flags(load, arch_irn_flags_rematerializable);
arch_add_irn_flags(load, arch_irn_flag_rematerializable);
res = new_r_Proj(load, mode_fp, pn_ia32_fld_res);
}
}
......@@ -2164,7 +2164,7 @@ static ir_node *gen_Load(ir_node *node)
assert((int)pn_ia32_xLoad_res == (int)pn_ia32_fld_res
&& (int)pn_ia32_fld_res == (int)pn_ia32_Load_res
&& (int)pn_ia32_Load_res == (int)pn_ia32_res);
arch_add_irn_flags(new_node, arch_irn_flags_rematerializable);
arch_add_irn_flags(new_node, arch_irn_flag_rematerializable);
}
SET_IA32_ORIG_NODE(new_node, node);
......@@ -3448,7 +3448,7 @@ static ir_node *gen_x87_fp_to_gp(ir_node *node)
set_irn_pinned(fist, op_pin_state_floats);
set_ia32_use_frame(fist);
set_ia32_op_type(fist, ia32_AddrModeD);
arch_add_irn_flags(fist, arch_irn_flags_spill);
arch_add_irn_flags(fist, arch_irn_flag_spill);
assert((long)pn_ia32_fist_M == (long) pn_ia32_fisttp_M);
ir_node *mem = new_r_Proj(fist, mode_M, pn_ia32_fist_M);
......@@ -3497,7 +3497,7 @@ static ir_node *gen_x87_conv(ir_mode *tgt_mode, ir_node *node)
tgt_mode);
set_ia32_use_frame(store);
set_ia32_op_type(store, ia32_AddrModeD);
arch_add_irn_flags(store, arch_irn_flags_spill);
arch_add_irn_flags(store, arch_irn_flag_spill);
SET_IA32_ORIG_NODE(store, node);
ir_node *store_mem = new_r_Proj(store, mode_M, pn_ia32_fst_M);
......@@ -3580,7 +3580,7 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode)
set_ia32_use_frame(store);
set_ia32_op_type(store, ia32_AddrModeD);
set_ia32_ls_mode(store, mode_Iu);
arch_add_irn_flags(store, arch_irn_flags_spill);
arch_add_irn_flags(store, arch_irn_flag_spill);
ir_node *store_mem = new_r_Proj(store, mode_M, pn_ia32_Store_M);
......@@ -3599,7 +3599,7 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode)
set_ia32_op_type(zero_store, ia32_AddrModeD);
add_ia32_am_offs_int(zero_store, 4);
set_ia32_ls_mode(zero_store, mode_Iu);
arch_add_irn_flags(zero_store, arch_irn_flags_spill);
arch_add_irn_flags(zero_store, arch_irn_flag_spill);
in[0] = zero_store_mem;
in[1] = store_mem;
......@@ -3834,7 +3834,7 @@ static ir_node *gen_be_Return(ir_node *node)
set_ia32_ls_mode(sse_store, mode);
set_ia32_op_type(sse_store, ia32_AddrModeD);
set_ia32_use_frame(sse_store);
arch_add_irn_flags(sse_store, arch_irn_flags_spill);
arch_add_irn_flags(sse_store, arch_irn_flag_spill);
ir_node *store_mem = new_r_Proj(sse_store, mode_M, pn_ia32_xStoreSimple_M);
/* load into x87 register */
......@@ -4072,8 +4072,8 @@ static ir_node *gen_ia32_l_LLtoFloat(ir_node *node)
set_ia32_op_type(store_high, ia32_AddrModeD);
set_ia32_ls_mode(store_low, mode_Iu);
set_ia32_ls_mode(store_high, mode_Is);
arch_add_irn_flags(store_low, arch_irn_flags_spill);
arch_add_irn_flags(store_high, arch_irn_flags_spill);
arch_add_irn_flags(store_low, arch_irn_flag_spill);
arch_add_irn_flags(store_high, arch_irn_flag_spill);
add_ia32_am_offs_int(store_high, 4);
ir_node *in[2] = { mem_low, mem_high };
......@@ -4139,7 +4139,7 @@ static ir_node *gen_ia32_l_FloattoLL(ir_node *node)
set_ia32_use_frame(fist);
set_ia32_op_type(fist, ia32_AddrModeD);
set_ia32_ls_mode(fist, mode_Ls);
arch_add_irn_flags(fist, arch_irn_flags_spill);
arch_add_irn_flags(fist, arch_irn_flag_spill);
assert((long)pn_ia32_fist_M == (long) pn_ia32_fisttp_M);
return new_r_Proj(fist, mode_M, pn_ia32_fist_M);
......@@ -4599,7 +4599,7 @@ static ir_node *gen_return_address(ir_node *node)
assert((int)pn_ia32_xLoad_res == (int)pn_ia32_fld_res
&& (int)pn_ia32_fld_res == (int)pn_ia32_Load_res
&& (int)pn_ia32_Load_res == (int)pn_ia32_res);
arch_add_irn_flags(load, arch_irn_flags_rematerializable);
arch_add_irn_flags(load, arch_irn_flag_rematerializable);
}
SET_IA32_ORIG_NODE(load, node);
......@@ -4646,7 +4646,7 @@ static ir_node *gen_frame_address(ir_node *node)
assert((int)pn_ia32_xLoad_res == (int)pn_ia32_fld_res
&& (int)pn_ia32_fld_res == (int)pn_ia32_Load_res
&& (int)pn_ia32_Load_res == (int)pn_ia32_res);
arch_add_irn_flags(load, arch_irn_flags_rematerializable);
arch_add_irn_flags(load, arch_irn_flag_rematerializable);
}
SET_IA32_ORIG_NODE(load, node);
......@@ -5172,7 +5172,7 @@ static ir_node *gen_Proj_Builtin(ir_node *proj)
static ir_node *gen_be_IncSP(ir_node *node)
{
ir_node *res = be_duplicate_node(node);
arch_add_irn_flags(res, arch_irn_flags_modify_flags);
arch_add_irn_flags(res, arch_irn_flag_modify_flags);
return res;
}
......@@ -5462,7 +5462,7 @@ static void postprocess_fp_call_results(void)
call_mem, res, res_mode);
set_ia32_op_type(vfst, ia32_AddrModeD);
set_ia32_use_frame(vfst);
arch_add_irn_flags(vfst, arch_irn_flags_spill);
arch_add_irn_flags(vfst, arch_irn_flag_spill);
ir_node *vfst_mem = new_r_Proj(vfst, mode_M, pn_ia32_fst_M);
......
......@@ -366,12 +366,12 @@ EOF
if (exists($n->{"irn_flags"})) {
$temp .= "\t/* flags */\n";
my %known_irn_flags = (
"none" => "arch_irn_flags_none",
"dont_spill" => "arch_irn_flags_dont_spill",
"rematerializable" => "arch_irn_flags_rematerializable",
"modify_flags" => "arch_irn_flags_modify_flags",
"simple_jump" => "arch_irn_flags_simple_jump",
"not_scheduled" => "arch_irn_flags_not_scheduled",
"none" => "arch_irn_flag_none",
"dont_spill" => "arch_irn_flag_dont_spill",
"rematerializable" => "arch_irn_flag_rematerializable",
"modify_flags" => "arch_irn_flag_modify_flags",
"simple_jump" => "arch_irn_flag_simple_jump",
"not_scheduled" => "arch_irn_flag_not_scheduled",
);
if (%custom_irn_flags) {
%known_irn_flags = (%known_irn_flags, %custom_irn_flags);
......
......@@ -28,10 +28,10 @@ struct sparc_attr_t
};
enum sparc_arch_irn_flags_t {
sparc_arch_irn_flag_needs_64bit_spillslot = arch_irn_flags_backend << 0,
sparc_arch_irn_flag_immediate_form = arch_irn_flags_backend << 1,
sparc_arch_irn_flag_aggregate_return = arch_irn_flags_backend << 2,
sparc_arch_irn_flag_has_delay_slot = arch_irn_flags_backend << 3,
sparc_arch_irn_flag_needs_64bit_spillslot = arch_irn_flag_backend << 0,
sparc_arch_irn_flag_immediate_form = arch_irn_flag_backend << 1,
sparc_arch_irn_flag_aggregate_return = arch_irn_flag_backend << 2,
sparc_arch_irn_flag_has_delay_slot = arch_irn_flag_backend << 3,
};
/**
......
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