experiment with new emitter style, change assembler syntax of ia32 backend to AT&T

ir/be/ia32/bearch_ia32.c

@@ -727,16 +727,16 @@ static arch_inverse_t *ia32_get_inverse(const void *self, const ir_node *irn, in
 				inverse->costs += 1;
 			}
 			break;
-		case iro_ia32_Eor:
+		case iro_ia32_Xor:
 			if (get_ia32_immop_type(irn) != ia32_ImmNone) {
 				/* xor with const: inverse = xor */
-				inverse->nodes[0] = new_rd_ia32_Eor(dbg, irg, block, noreg, noreg, get_irn_n(irn, i), noreg, nomem);
+				inverse->nodes[0] = new_rd_ia32_Xor(dbg, irg, block, noreg, noreg, get_irn_n(irn, i), noreg, nomem);
 				inverse->costs   += (get_ia32_immop_type(irn) == ia32_ImmSymConst) ? 5 : 1;
 				copy_ia32_Immop_attr(inverse->nodes[0], (ir_node *)irn);
 			}
 			else {
 				/* normal xor */
-				inverse->nodes[0] = new_rd_ia32_Eor(dbg, irg, block, noreg, noreg, (ir_node *) irn, get_irn_n(irn, i), nomem);
+				inverse->nodes[0] = new_rd_ia32_Xor(dbg, irg, block, noreg, noreg, (ir_node *) irn, get_irn_n(irn, i), nomem);
 				inverse->costs   += 1;
 			}
 			break;
@@ -745,8 +745,8 @@ static arch_inverse_t *ia32_get_inverse(const void *self, const ir_node *irn, in
 			inverse->costs   += 1;
 			break;
 		}
-		case iro_ia32_Minus: {
-			inverse->nodes[0] = new_rd_ia32_Minus(dbg, irg, block, noreg, noreg, (ir_node*) irn, nomem);
+		case iro_ia32_Neg: {
+			inverse->nodes[0] = new_rd_ia32_Neg(dbg, irg, block, noreg, noreg, (ir_node*) irn, nomem);
 			inverse->costs   += 1;
 			break;
 		}
@@ -893,23 +893,6 @@ ia32_irn_ops_t ia32_irn_ops = {
  *                       |___/
  **************************************************/
 
-/**
- * Transform the Thread Local Store base.
- */
-static void transform_tls(ir_graph *irg) {
-	ir_node *irn = get_irg_tls(irg);
-
-	if (irn) {
-		dbg_info *dbg = get_irn_dbg_info(irn);
-		ir_node  *blk = get_nodes_block(irn);
-		ir_node  *newn;
-		newn = new_rd_ia32_LdTls(dbg, irg, blk, get_irn_mode(irn));
-
-		exchange(irn, newn);
-		set_irg_tls(irg, newn);
-	}
-}
-
 /**
  * Transforms the standard firm graph into
  * an ia32 firm graph
@@ -920,17 +903,15 @@ static void ia32_prepare_graph(void *self) {
 
 	FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.transform");
 
-	/* 1st: transform constants and psi condition trees */
+	/* 1st: transform psi condition trees */
 	ia32_pre_transform_phase(cg);
 
 	/* 2nd: transform all remaining nodes */
-	transform_tls(cg->irg);
 	ia32_transform_graph(cg);
 	// Matze: disabled for now. Because after transformation start block has no
-	// self-loop anymore so it will probably melt with its successor block.
-	//
-	// This will bring several nodes to the startblock and we still can't
-	// handle spill before the initial IncSP nicely
+	// self-loop anymore so it might be merged with its successor block. This
+	// will bring several nodes to the startblock which sometimes get scheduled
+	// before the initial IncSP/Barrier
 	//local_optimize_graph(cg->irg);
 
 	if (cg->dump)
@@ -1400,7 +1381,7 @@ static void ia32_codegen(void *self) {
 	ia32_code_gen_t *cg = self;
 	ir_graph        *irg = cg->irg;
 
-	ia32_gen_routine(cg->isa->out, irg, cg);
+	ia32_gen_routine(cg, cg->isa->out, irg);
 
 	cur_reg_set = NULL;
 
@@ -1597,7 +1578,6 @@ static void *ia32_init(FILE *file_handle) {
 
 	ia32_handle_intrinsics();
 	ia32_switch_section(isa->out, NO_SECTION);
-	fprintf(isa->out, "\t.intel_syntax\n");
 
 	/* needed for the debug support */
 	ia32_switch_section(isa->out, SECTION_TEXT);

ir/be/ia32/ia32_emitter.h

 /**
  * Header file for ia32 emitter, containing some function definitions and types.
- * @author Christian Wuerdig
+ * @author Christian Wuerdig, Matthias Braun
  * $Id$
  */
-
 #ifndef _IA32_EMITTER_H_
 #define _IA32_EMITTER_H_
 
-#include "irargs_t.h"  // this also inlucdes <libcore/lc_print.h>
+#include "irargs_t.h"
 #include "irnode.h"
 #include "debug.h"
 
@@ -20,22 +19,45 @@ typedef struct _ia32_emit_env_t {
 	const arch_env_t      *arch_env;
 	const ia32_code_gen_t *cg;
 	ia32_isa_t            *isa;
+	struct obstack        *obst;
+	int                    linelength;
 	DEBUG_ONLY(firm_dbg_module_t *mod;)
 } ia32_emit_env_t;
 
-const lc_arg_env_t *ia32_get_arg_env(void);
+static INLINE void ia32_emit_char(ia32_emit_env_t *env, char c)
+{
+	obstack_1grow(env->obst, c);
+	env->linelength++;
+}
+
+static INLINE void ia32_emit_string_len(ia32_emit_env_t *env, const char *str, size_t l)
+{
+	obstack_grow(env->obst, str, l);
+	env->linelength += l;
+}
 
-const char *ia32_emit_binop(const ir_node *irn, ia32_emit_env_t *env);
-const char *ia32_emit_unop(const ir_node *irn, ia32_emit_env_t *env);
-const char *ia32_emit_am(const ir_node *irn, ia32_emit_env_t *env);
-const char *ia32_emit_adr(const ir_node *irn, ia32_emit_env_t *env);
+static INLINE void ia32_emit_string(ia32_emit_env_t *env, const char *str)
+{
+	size_t len = strlen(str);
+	ia32_emit_string_len(env, str, len);
+}
 
-const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env);
+#define ia32_emit_cstring(env,x) { ia32_emit_string_len(env, x, sizeof(x)-1); }
 
-int get_ia32_reg_nr(ir_node *irn, int posi, int in_out);
-const char *get_ia32_in_reg_name(ir_node *irn, int pos);
+void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos);
+void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos);
+void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos);
+void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode);
+void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode);
+void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_adr(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node);
+void ia32_emit_finish_line(ia32_emit_env_t *env, const ir_node *node);
 
-void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg);
+void ia32_gen_routine(ia32_code_gen_t *cg, FILE *F, ir_graph *irg);
 
 /**
  * Sections.

ir/be/ia32/ia32_finish.c

@@ -66,14 +66,14 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
 		int size;
 		ident *name;
 
-		res = new_rd_ia32_xEor(dbg, irg, block, noreg, noreg, in2, noreg_fp, nomem);
+		res = new_rd_ia32_xXor(dbg, irg, block, noreg, noreg, in2, noreg_fp, nomem);
 		size = get_mode_size_bits(mode);
 		name = ia32_gen_fp_known_const(size == 32 ? ia32_SSIGN : ia32_DSIGN);
 		set_ia32_am_sc(res, name);
 		set_ia32_op_type(res, ia32_AddrModeS);
 		set_ia32_ls_mode(res, mode);
 	} else {
-		res = new_rd_ia32_Minus(dbg, irg, block, noreg, noreg, in2, nomem);
+		res = new_rd_ia32_Neg(dbg, irg, block, noreg, noreg, in2, nomem);
 	}
 	arch_set_irn_register(cg->arch_env, res, in2_reg);
 
@@ -124,9 +124,8 @@ static void ia32_transform_lea_to_add(ir_node *irn, ia32_code_gen_t *cg) {
 	ir_node          *res = NULL;
 	ir_node          *nomem, *noreg, *base, *index, *op1, *op2;
 	ir_node          *block;
-	const char       *offs = NULL;
+	int              offs = 0;
 	const arch_register_t *out_reg, *base_reg, *index_reg;
-	int              imm_tp = ia32_ImmConst;
 
 	/* must be a LEA */
 	if (! is_ia32_Lea(irn))
@@ -134,6 +133,7 @@ static void ia32_transform_lea_to_add(ir_node *irn, ia32_code_gen_t *cg) {
 
 	am_flav = get_ia32_am_flavour(irn);
 
+	/* mustn't have a symconst */
 	if (get_ia32_am_sc(irn))
 		return;
 
@@ -149,18 +149,7 @@ static void ia32_transform_lea_to_add(ir_node *irn, ia32_code_gen_t *cg) {
 	index = get_irn_n(irn,1);
 
 	if (am_flav & ia32_O) {
-		offs  = get_ia32_am_offs(irn);
-
-		if (! offs) {
-			ident *id = get_ia32_am_sc(irn);
-
-			assert(id != NULL);
-			offs   = get_id_str(id);
-			imm_tp = ia32_ImmSymConst;
-		}
-		/* offset has a explicit sign -> we need to skip + */
-		else if (offs[0] == '+')
-			offs++;
+		offs  = get_ia32_am_offs_int(irn);
 	}
 
 	out_reg   = arch_get_irn_register(cg->arch_env, irn);
@@ -218,8 +207,8 @@ static void ia32_transform_lea_to_add(ir_node *irn, ia32_code_gen_t *cg) {
 	set_ia32_commutative(res);
 
 	if (imm) {
-		set_ia32_cnst(res, offs);
-		set_ia32_immop_type(res, imm_tp);
+		tarval *tv = new_tarval_from_long(offs, mode_Iu);
+		set_ia32_Immop_tarval(res, tv);
 	}
 
 	SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, irn));

ir/be/ia32/ia32_intrinsics.c

@@ -191,7 +191,7 @@ static int map_Shrs(ir_node *call, void *ctx) {
 	l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_res_mode);
 
 	/* h_res = SAR a_h, cnt */
-	h_res = new_rd_ia32_l_Shrs(dbg, irg, block, a_h, cnt, h_res_mode);
+	h_res = new_rd_ia32_l_Sar(dbg, irg, block, a_h, cnt, h_res_mode);
 
 	//add_irn_dep(h_res, l_res);
 
@@ -225,13 +225,13 @@ static int map_Mul(ir_node *call, void *ctx) {
 		t3 = a_l * b_h
 		h_res = t2 + t3
 	*/
-	mul   = new_rd_ia32_l_MulS(dbg, irg, block, a_l, b_l);
-	pEDX  = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_MulS_EDX);
-	l_res = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_MulS_EAX);
+	mul   = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_l);
+	pEDX  = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_Mul_EDX);
+	l_res = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_Mul_EAX);
 
-	mul   = new_rd_ia32_l_Mul(dbg, irg, block, a_h, b_l, h_res_mode);
+	mul   = new_rd_ia32_l_Mul(dbg, irg, block, a_h, b_l);
 	add   = new_rd_ia32_l_Add(dbg, irg, block, mul, pEDX, h_res_mode);
-	mul   = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_h, h_res_mode);
+	mul   = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_h);
 	h_res = new_rd_ia32_l_Add(dbg, irg, block, add, mul, h_res_mode);
 
 	resolve_call(call, l_res, h_res, irg, block);
@@ -298,9 +298,9 @@ static int map_Abs(ir_node *call, void *ctx) {
 
 	*/
 
-	sign  = new_rd_ia32_l_Shrs(dbg, irg, block, a_h, new_Const_long(h_res_mode, 31), h_res_mode);
-	sub_l = new_rd_ia32_l_Eor(dbg, irg, block, a_l, sign, l_res_mode);
-	sub_h = new_rd_ia32_l_Eor(dbg, irg, block, a_h, sign, h_res_mode);
+	sign  = new_rd_ia32_l_Sar(dbg, irg, block, a_h, new_Const_long(h_res_mode, 31), h_res_mode);
+	sub_l = new_rd_ia32_l_Xor(dbg, irg, block, a_l, sign, l_res_mode);
+	sub_h = new_rd_ia32_l_Xor(dbg, irg, block, a_h, sign, h_res_mode);
 	res   = new_rd_ia32_Sub64Bit(dbg, irg, block, sub_l, sub_h, sign, sign);
 	l_res = new_r_Proj(irg, block, res, l_res_mode, pn_ia32_Sub64Bit_low_res);
 	h_res = new_r_Proj(irg, block, res, h_res_mode, pn_ia32_Sub64Bit_high_res);

ir/be/ia32/ia32_new_nodes.c

@@ -201,11 +201,17 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			break;
 
 		case dump_node_nodeattr_txt:
-			if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n) || is_ia32_Cnst(n)) {
-				char       *pref = is_ia32_ImmSymConst(n) || (get_ia32_op_type(n) == ia32_SymConst) ? "SymC " : "";
-				const char *cnst = get_ia32_cnst(n);
-
-				fprintf(F, "[%s%s]", pref, cnst ? cnst : "NONE");
+			if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+				if(is_ia32_ImmSymConst(n)) {
+					ident *id = get_ia32_Immop_symconst(n);
+					fprintf(F, "[SymC %s]", get_id_str(id));
+				} else {
+					char buf[128];
+					tarval *tv = get_ia32_Immop_tarval(n);
+
+					tarval_snprintf(buf, sizeof(buf), tv);
+					fprintf(F, "[%s]", buf);
+				}
 			}
 
 			if (! is_ia32_Lea(n)) {
@@ -258,12 +264,6 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 				case ia32_Normal:
 					fprintf(F, "Normal");
 					break;
-				case ia32_Const:
-					fprintf(F, "Const");
-					break;
-				case ia32_SymConst:
-					fprintf(F, "SymConst");
-					break;
 				case ia32_AddrModeD:
 					fprintf(F, "AM Dest (Load+Store)");
 					break;
@@ -338,14 +338,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			fprintf(F, " (%d)\n", am_flav);
 
 			/* dump AM offset */
-			fprintf(F, "AM offset = ");
-			if (get_ia32_am_offs(n)) {
-				fprintf(F, "%s", get_ia32_am_offs(n));
-			}
-			else {
-				fprintf(F, "n/a");
+			if(get_ia32_am_offs_int(n) != 0) {
+				fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
 			}
-			fprintf(F, "\n");
 
 			/* dump AM symconst */
 			if(get_ia32_am_sc(n) != NULL) {
@@ -460,16 +455,6 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
  *                                       |___/
  ***************************************************************************************************/
 
-/**
- * Returns an ident for the given tarval tv.
- */
-static ident *get_ident_for_tv(tarval *tv) {
-	char buf[1024];
-	int len = tarval_snprintf(buf, sizeof(buf), tv);
-	assert(len);
-	return new_id_from_str(buf);
-}
-
 /**
  * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
  * Firm was made by people hating const :-(
@@ -503,14 +488,6 @@ ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
 	return attr->data.imm_tp;
 }
 
-/**
- * Sets the immediate op type of an ia32 node.
- */
-void set_ia32_immop_type(ir_node *node, ia32_immop_type_t tp) {
-	ia32_attr_t *attr = get_ia32_attr(node);
-	attr->data.imm_tp = tp;
-}
-
 /**
  * Gets the supported addrmode of an ia32 node
  */
@@ -543,18 +520,6 @@ void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
 	attr->data.am_flavour = am_flavour;
 }
 
-/**
- * Joins all offsets to one string with adds.
- */
-char *get_ia32_am_offs(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
-	static char res[64];
-
-	snprintf(res, sizeof(res), "%+d", attr->am_offs);
-
-	return res;
-}
-
 /**
  * Gets the addressmode offset as int.
  */
@@ -571,53 +536,11 @@ void set_ia32_am_offs_int(ir_node *node, int offset) {
 	attr->am_offs = offset;
 }
 
-#if 0
-/**
- * Add an offset for addrmode.
- */
-static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
-	ia32_attr_t *attr = get_ia32_attr(node);
-	int res, o;
-
-	if (offset == NULL || offset[0] == '\0')
-		return;
-
-	if (offset[0] == '-')
-		res = sscanf(offset, "%d", &o);
-	else
-		res = sscanf(offset, "%u", &o);
-	assert(res == 1);
-
-	if (op == '-')
-		attr->am_offs -= o;
-	else if (op == '+')
-		attr->am_offs += o;
-	else
-		assert(0);
-}
-
-/**
- * Add an offset for addrmode.
- */
-void add_ia32_am_offs(ir_node *node, const char *offset) {
-	extend_ia32_am_offs(node, (char *)offset, '+');
-}
-#endif
-
 void add_ia32_am_offs_int(ir_node *node, int offset) {
 	ia32_attr_t *attr = get_ia32_attr(node);
 	attr->am_offs += offset;
 }
 
-#if 0
-/**
- * Sub an offset for addrmode.
- */
-void sub_ia32_am_offs(ir_node *node, const char *offset) {
-	extend_ia32_am_offs(node, (char *)offset, '-');
-}
-#endif
-
 /**
  * Returns the symconst ident associated to addrmode.
  */
@@ -679,6 +602,7 @@ void set_ia32_am_scale(ir_node *node, int scale) {
  */
 tarval *get_ia32_Immop_tarval(const ir_node *node) {
 	ia32_attr_t *attr = get_ia32_attr(node);
+	assert(attr->data.imm_tp == ia32_ImmConst);
     return attr->cnst_val.tv;
 }
 
@@ -687,59 +611,20 @@ tarval *get_ia32_Immop_tarval(const ir_node *node) {
  */
 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
 	ia32_attr_t *attr = get_ia32_attr(node);
+	attr->data.imm_tp = ia32_ImmConst;
 	attr->cnst_val.tv = tv;
-	attr->cnst        = get_ident_for_tv(tv);
 }
 
-/**
- * Sets a symconsts ident
- */
-void set_ia32_Symconst_ident(ir_node *node, ident *ident)
-{
+void set_ia32_Immop_symconst(ir_node *node, ident *ident) {
 	ia32_attr_t *attr = get_ia32_attr(node);
+	attr->data.imm_tp = ia32_ImmSymConst;
 	attr->cnst_val.sc = ident;
-	attr->cnst        = ident;
-}
-
-/**
- * Gets the string representation of the internal const (tv or symconst)
- */
-const char *get_ia32_cnst(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
-	if (! attr->cnst)
-		return NULL;
-	return get_id_str(attr->cnst);
-}
-
-tarval *get_ia32_cnst_tv(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);