Commit f32a6b43 authored by Matthias Braun's avatar Matthias Braun
Browse files

amd64: fix and rename get_insn_size_bits()

parent 172985da
......@@ -78,7 +78,7 @@ static void transform_sub_to_neg_add(ir_node *node,
ir_node *add;
unsigned pos;
if (is_amd64_subs(node)) {
unsigned bits = get_insn_size_bits(attr->base.size);
unsigned bits = amd64_get_insn_size_bits(attr->base.size);
ir_tarval *tv = get_mode_one(amd64_mode_xmm);
tv = tarval_shl_unsigned(tv, bits - 1);
ir_entity *sign_bit_const = create_float_const_entity(tv);
......
......@@ -68,16 +68,17 @@ x87_attr_t const *amd64_get_x87_attr_const(ir_node const *const node)
return amd64_get_x87_attr((ir_node *)node);
}
unsigned get_insn_size_bits(amd64_insn_size_t size)
unsigned amd64_get_insn_size_bits(amd64_insn_size_t const size)
{
switch (size) {
case INSN_SIZE_8: return 8;
case INSN_SIZE_16: return 16;
case INSN_SIZE_32: return 32;
case INSN_SIZE_64: return 64;
case INSN_SIZE_128: return 128;
default: panic("bad insn mode");
case INSN_SIZE_8: return 8;
case INSN_SIZE_16: return 16;
case INSN_SIZE_32: return 32;
case INSN_SIZE_64: return 64;
case INSN_SIZE_80: return 80;
case INSN_SIZE_128: return 128;
}
panic("bad insn mode");
}
static const char *get_op_mode_string(amd64_op_mode_t const op_mode)
......
......@@ -186,7 +186,7 @@ x87_attr_t *amd64_get_x87_attr(ir_node *node);
x87_attr_t const *amd64_get_x87_attr_const(ir_node const *node);
amd64_insn_size_t get_amd64_insn_size(const ir_node *node);
unsigned get_insn_size_bits(amd64_insn_size_t insn_size);
unsigned amd64_get_insn_size_bits(amd64_insn_size_t insn_size);
/* Include the generated headers */
#include "gen_amd64_new_nodes.h"
......
......@@ -1213,7 +1213,7 @@ static ir_node *create_div(ir_node *const node, ir_mode *const mode,
arch_register_req_t const**, amd64_insn_size_t);
/* We have to extend the value to a 2nd register */
if (mode_is_signed(mode)) {
int32_t bits = get_insn_size_bits(size);
int32_t bits = amd64_get_insn_size_bits(size);
upper_value = create_sar(dbgi, new_block, size, new_op1, bits-1);
constructor = new_bd_amd64_idiv;
} else {
......@@ -2824,7 +2824,7 @@ static ir_node *gen_clz(ir_node *const node)
dbg_info *const dbgi = get_irn_dbg_info(real);
ir_node *const block = get_nodes_block(real);
amd64_insn_size_t const size = get_amd64_insn_size(real);
size_t const mask = get_insn_size_bits(size) - 1;
size_t const mask = amd64_get_insn_size_bits(size) - 1;
ir_node *const in[] = { bsr };
amd64_binop_addr_attr_t attr = {
.base = {
......
......@@ -7,7 +7,7 @@
static void sim_amd64_fst(x87_state *const state, ir_node *const node)
{
amd64_addr_attr_t const *const attr = get_amd64_addr_attr_const(node);
unsigned const bits = get_insn_size_bits(attr->size);
unsigned const bits = amd64_get_insn_size_bits(attr->size);
x86_sim_x87_store(state, node, 0, bits);
}
......
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