Commit f3abfc04 authored by Robin Redeker's avatar Robin Redeker
Browse files

amd64: using mode_Lu for registers now.

[r27669]
parent 568a2734
......@@ -291,7 +291,7 @@ static void emit_amd64_Jcc(const ir_node *irn)
proj_true = proj_false;
proj_false = t;
proj_num = get_negated_pnc(proj_num, mode_Iu);
proj_num = get_negated_pnc(proj_num, mode_Lu);
}
switch (proj_num) {
......
......@@ -115,7 +115,7 @@ $arch = "amd64";
{ name => "r14", type => 2 },
{ name => "r15", type => 2 },
# { name => "gp_NOREG", type => 4 }, # we need a dummy register for NoReg nodes
{ mode => "mode_Iu" }
{ mode => "mode_Lu" }
],
# fp => [
# { name => "xmm0", type => 1 },
......@@ -142,7 +142,7 @@ $arch = "amd64";
],
);
$mode_gp = "mode_Iu";
$mode_gp = "mode_Lu";
$mode_flags = "mode_Iu";
sub amd64_custom_init_attr {
......
......@@ -75,8 +75,8 @@ static ir_node *create_const_graph(ir_node *irn, ir_node *block)
if (mode_is_reference(mode)) {
/* AMD64 is 64bit, so we can safely convert a reference tarval into Iu */
assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_Iu));
tv = tarval_convert_to(tv, mode_Iu);
assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_Lu));
tv = tarval_convert_to(tv, mode_Lu);
}
value = get_tarval_long(tv);
......@@ -283,8 +283,8 @@ static ir_node *gen_Phi(ir_node *node)
ir_node *phi;
if (mode_needs_gp_reg(mode)) {
/* all integer operations are on 32bit registers now */
mode = mode_Iu;
/* all integer operations are on 64bit registers now */
mode = mode_Lu;
req = amd64_reg_classes[CLASS_amd64_gp].class_req;
} else {
req = arch_no_register_req;
......@@ -435,7 +435,7 @@ static ir_node *gen_Proj_Load(ir_node *node)
case iro_amd64_Load:
/* handle all gp loads equal: they have the same proj numbers. */
if (proj == pn_Load_res) {
return new_rd_Proj(dbgi, new_load, mode_Iu, pn_amd64_Load_res);
return new_rd_Proj(dbgi, new_load, mode_Lu, pn_amd64_Load_res);
} else if (proj == pn_Load_M) {
return new_rd_Proj(dbgi, new_load, mode_M, pn_amd64_Load_M);
}
......
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