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Zwinkau
libfirm
Commits
f4479a46
Commit
f4479a46
authored
May 02, 2007
by
Matthias Braun
Browse files
cleanups, use the new tarval emitter
[r13587]
parent
d9811e8b
Changes
3
Hide whitespace changes
Inline
Side-by-side
ir/be/ia32/bearch_ia32_t.h
View file @
f4479a46
...
...
@@ -45,24 +45,27 @@
#endif
/* NDEBUG */
/* some typedefs */
typedef
enum
ia32_optimize_t
ia32_optimize_t
;
typedef
enum
cpu_support
cpu_support
;
typedef
enum
fp_support
fp_support
;
/**
* Bitmask for the backend optimization settings.
*/
typedef
enum
_
ia32_optimize_t
{
enum
ia32_optimize_t
{
IA32_OPT_INCDEC
=
1
,
/**< optimize add/sub 1/-1 to inc/dec */
IA32_OPT_DOAM
=
2
,
/**< do address mode optimizations */
IA32_OPT_LEA
=
4
,
/**< optimize address calculations into LEAs */
IA32_OPT_PLACECNST
=
8
,
/**< place constants in the blocks where they are used */
IA32_OPT_IMMOPS
=
16
,
/**< create operations with immediate operands */
IA32_OPT_PUSHARGS
=
32
,
/**< create pushs for function argument passing */
}
ia32_optimize_t
;
};
/**
* Architectures. Clustered for easier macro implementation,
* do not change.
*/
typedef
enum
cpu_support
{
enum
cpu_support
{
arch_i386
,
/**< i386 */
arch_i486
,
/**< i486 */
arch_pentium
,
/**< Pentium */
...
...
@@ -77,7 +80,7 @@ typedef enum cpu_support {
arch_athlon
,
/**< Athlon */
arch_athlon_64
,
/**< Athlon64 */
arch_opteron
,
/**< Opteron */
}
cpu_support
;
};
/** checks for l <= x <= h */
#define _IN_RANGE(x, l, h) ((unsigned)((x) - (l)) <= (unsigned)((h) - (l)))
...
...
@@ -92,11 +95,11 @@ typedef enum cpu_support {
_IN_RANGE((x), arch_athlon, arch_opteron))
/** floating point support */
typedef
enum
fp_support
{
enum
fp_support
{
fp_none
,
/**< no floating point instructions are used */
fp_x87
,
/**< use x87 instructions */
fp_sse2
/**< use SSE2 instructions */
}
fp_support
;
};
/** Sets the used flag to the current floating point architecture. */
#define FP_USED(cg) ((cg)->used_fp = (cg)->fp_kind)
...
...
@@ -110,12 +113,15 @@ typedef enum fp_support {
/** Sets the flag to enforce x87 simulation. */
#define FORCE_x87(cg) ((cg)->force_sim = 1)
typedef
struct
_ia32_isa_t
ia32_isa_t
;
typedef
struct
ia32_isa_t
ia32_isa_t
;
typedef
struct
ia32_code_gen_t
ia32_code_gen_t
;
typedef
struct
ia32_irn_ops_t
ia32_irn_ops_t
;
typedef
struct
ia32_intrinsic_env_t
ia32_intrinsic_env_t
;
/**
* IA32 code generator
*/
typedef
struct
_
ia32_code_gen_t
{
struct
ia32_code_gen_t
{
const
arch_code_generator_if_t
*
impl
;
/**< implementation */
ir_graph
*
irg
;
/**< current irg */
const
arch_env_t
*
arch_env
;
/**< the arch env */
...
...
@@ -140,12 +146,12 @@ typedef struct _ia32_code_gen_t {
ir_node
*
fpu_trunc_mode
;
/**< truncate fpu mode */
struct
obstack
*
obst
;
}
ia32_code_gen_t
;
};
/**
* IA32 ISA object
*/
struct
_
ia32_isa_t
{
struct
ia32_isa_t
{
arch_isa_t
arch_isa
;
/**< must be derived from arch_isa_t */
be_emit_env_t
emit
;
pmap
*
regs_16bit
;
/**< Contains the 16bits names of the gp registers */
...
...
@@ -163,18 +169,18 @@ struct _ia32_isa_t {
#endif
/* NDEBUG */
};
typedef
struct
_
ia32_irn_ops_t
{
struct
ia32_irn_ops_t
{
const
arch_irn_ops_if_t
*
impl
;
ia32_code_gen_t
*
cg
;
}
ia32_irn_ops_t
;
};
typedef
struct
_
ia32_intrinsic_env_t
{
struct
ia32_intrinsic_env_t
{
ir_graph
*
irg
;
/**< the irg, these entities belong to */
ir_entity
*
ll_div_op1
;
/**< entity for first div operand (move into FPU) */
ir_entity
*
ll_div_op2
;
/**< entity for second div operand (move into FPU) */
ir_entity
*
ll_d_conv
;
/**< entity for converts ll -> d */
ir_entity
*
d_ll_conv
;
/**< entity for converts d -> ll */
}
ia32_intrinsic_env_t
;
};
/** mode for the floating point control word */
extern
ir_mode
*
mode_fpcw
;
...
...
@@ -229,4 +235,4 @@ ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op,
const
ir_mode
*
imode
,
const
ir_mode
*
omode
,
void
*
context
);
#endif
/* FIRM_BE_IA32_BEARCH_IA32_T_H */
#endif
ir/be/ia32/ia32_emitter.c
View file @
f4479a46
...
...
@@ -143,16 +143,6 @@ const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
return
reg
;
}
/**
* Returns an ident for the given tarval tv.
*/
static
ident
*
get_ident_for_tv
(
tarval
*
tv
)
{
char
buf
[
256
];
tarval_snprintf
(
buf
,
sizeof
(
buf
),
tv
);
return
new_id_from_str
(
buf
);
}
/**
* Determine the gnu assembler suffix that indicates a mode
*/
...
...
@@ -278,20 +268,21 @@ void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
switch
(
get_ia32_immop_type
(
node
))
{
case
ia32_ImmConst
:
tv
=
get_ia32_Immop_tarval
(
node
);
id
=
get_ident_for_tv
(
tv
);
b
re
ak
;
be_emit_tarval
(
env
->
emit
,
tv
);
re
turn
;
case
ia32_ImmSymConst
:
ent
=
get_ia32_Immop_symconst
(
node
);
mark_entity_visited
(
ent
);
id
=
get_entity_ld_ident
(
ent
);
break
;
default:
assert
(
0
);
be_emit_string
(
env
,
"BAD"
);
be_emit_ident
(
env
,
id
);
return
;
case
ia32_ImmNone
:
break
;
}
be_emit_ident
(
env
,
id
);
assert
(
0
);
be_emit_string
(
env
,
"BAD"
);
return
;
}
void
ia32_emit_mode_suffix
(
ia32_emit_env_t
*
env
,
const
ir_mode
*
mode
)
...
...
ir/be/ia32/ia32_emitter.h
View file @
f4479a46
...
...
@@ -33,12 +33,14 @@
#include "bearch_ia32_t.h"
typedef
struct
ia32_emit_env_t
{
typedef
struct
ia32_emit_env_t
ia32_emit_env_t
;
struct
ia32_emit_env_t
{
be_emit_env_t
*
emit
;
const
arch_env_t
*
arch_env
;
const
ia32_code_gen_t
*
cg
;
ia32_isa_t
*
isa
;
}
ia32_emit_env_t
;
};
void
ia32_emit_source_register
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
,
int
pos
);
void
ia32_emit_dest_register
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
,
int
pos
);
...
...
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