Commit f7e1bba3 authored by Matthias Braun's avatar Matthias Braun
Browse files

use designated initializers for backend_params

parent 54cab3e0
......@@ -171,19 +171,19 @@ static int TEMPLATE_is_mux_allowed(ir_node *sel, ir_node *mux_false,
static const backend_params *TEMPLATE_get_backend_params(void)
{
static backend_params p = {
false, /* false: little-endian, true: big-endian */
false, /* PIC code supported */
false, /* unaligned memory access supported */
32, /* modulo_shift */
NULL, /* architecture dependent settings, will be set later */
TEMPLATE_is_mux_allowed, /* parameter for if conversion */
32, /* machine size - a 32bit CPU */
NULL, /* float arithmetic mode */
NULL, /* long long type */
NULL, /* unsigned long long type */
NULL, /* long double type */
4, /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
ir_overflow_min_max
.byte_order_big_endian = false,
.pic_supported = false,
.unaligned_memaccess_supported = false,
.modulo_shift = 32,
.dep_param = NULL,
.allow_ifconv = TEMPLATE_is_mux_allowed,
.machine_size = 32,
.mode_float_arithmetic = NULL,
.type_long_long = NULL,
.type_unsigned_long_long = NULL,
.type_long_double = NULL,
.stack_param_align = 4,
.float_int_overflow = ir_overflow_min_max,
};
return &p;
}
......
......@@ -752,33 +752,32 @@ static int amd64_is_mux_allowed(ir_node *sel, ir_node *mux_false,
}
static const ir_settings_arch_dep_t amd64_arch_dep = {
1, /* also use subs */
4, /* maximum shifts */
63, /* maximum shift amount */
NULL, /* evaluate the instruction sequence */
1, /* allow Mulhs */
1, /* allow Mulus */
32, /* Mulh allowed up to 32 bit */
.also_use_subs = true,
.maximum_shifts = 4,
.highest_shift_amount = 63,
.evaluate = NULL,
.allow_mulhs = true,
.allow_mulhu = true,
.max_bits_for_mulh = 32,
};
/**
* Returns the libFirm configuration parameter for this backend.
*/
static const backend_params *amd64_get_backend_params(void) {
static backend_params p = {
false, /* little endian */
false, /* PIC code not supported */
true, /* unaligned memory */
32, /* modulo shift */
&amd64_arch_dep,
amd64_is_mux_allowed, /* parameter for if conversion */
64, /* machine size */
NULL, /* float arithmetic mode */
NULL, /* long long type */
NULL, /* unsigned long long type */
NULL, /* long double type (not supported yet) */
8, /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
ir_overflow_indefinite
.byte_order_big_endian = false,
.pic_supported = false,
.unaligned_memaccess_supported = true,
.modulo_shift = 32,
.dep_param = &amd64_arch_dep,
.allow_ifconv = amd64_is_mux_allowed,
.machine_size = 64,
.mode_float_arithmetic = NULL, /* will be set later */
.type_long_long = NULL, /* will be set later */
.type_unsigned_long_long = NULL, /* will be set later */
.type_long_double = NULL, /* will be set later */
.stack_param_align = 8,
.float_int_overflow = ir_overflow_indefinite
};
return &p;
}
......
......@@ -329,28 +329,28 @@ static void arm_lower_for_target(void)
}
static const ir_settings_arch_dep_t arm_arch_dep = {
1, /* allow subs */
1, /* Muls are fast enough on ARM but ... */
31, /* ... one shift would be possible better */
NULL, /* no evaluator function */
0, /* SMUL is needed, only in Arch M */
0, /* UMUL is needed, only in Arch M */
ARM_MACHINE_SIZE, /* SMUL & UMUL available for 32 bit */
.also_use_subs = true,
.maximum_shifts = 1,
.highest_shift_amount = 31,
.evaluate = NULL,
.allow_mulhs = false,
.allow_mulhu = false,
.max_bits_for_mulh = ARM_MACHINE_SIZE,
};
static backend_params arm_backend_params = {
false, /* big endian */
false, /* PIC code not supported */
false, /* unaligned memory access */
ARM_MODULO_SHIFT, /* modulo shift */
&arm_arch_dep,
arm_is_mux_allowed, /* allow_ifconv function */
ARM_MACHINE_SIZE, /* machine size */
NULL, /* float arithmetic mode */
NULL, /* long long type */
NULL, /* unsigned long long type */
NULL, /* long double type */
4, /* alignment of stack parameter */
ir_overflow_min_max
.byte_order_big_endian = false,
.pic_supported = false,
.unaligned_memaccess_supported = false,
.modulo_shift = ARM_MODULO_SHIFT,
.dep_param = &arm_arch_dep,
.allow_ifconv = arm_is_mux_allowed,
.machine_size = ARM_MACHINE_SIZE,
.mode_float_arithmetic = NULL,
.type_long_long = NULL,
.type_unsigned_long_long = NULL,
.type_long_double = NULL,
.stack_param_align = 4,
.float_int_overflow = ir_overflow_min_max,
};
static void arm_init_backend_params(void)
......
......@@ -1499,29 +1499,28 @@ static int ia32_is_mux_allowed(ir_node *sel, ir_node *mux_false,
}
static const ir_settings_arch_dep_t ia32_arch_dep = {
1, /* also use subs */
4, /* maximum shifts */
63, /* maximum shift amount */
ia32_evaluate_insn, /* evaluate the instruction sequence */
1, /* allow Mulhs */
1, /* allow Mulus */
32, /* Mulh allowed up to 32 bit */
.also_use_subs = true,
.maximum_shifts = 4,
.highest_shift_amount = 63,
.evaluate = ia32_evaluate_insn,
.allow_mulhs = true,
.allow_mulhu = true,
.max_bits_for_mulh = 32,
};
static backend_params ia32_backend_params = {
false, /* little endian */
true, /* PIC code supported */
true, /* unaligned memory access */
32, /* modulo shift */
&ia32_arch_dep, /* will be set later */
ia32_is_mux_allowed,
32, /* machine_size */
NULL, /* float arithmetic mode, will be set below */
NULL, /* long long type */
NULL, /* unsigned long long type */
NULL, /* long double type */
4, /* alignment of stack parameter */
ir_overflow_indefinite
.byte_order_big_endian = false,
.pic_supported = true,
.unaligned_memaccess_supported = true,
.modulo_shift = 32,
.dep_param = &ia32_arch_dep,
.allow_ifconv = ia32_is_mux_allowed,
.machine_size = 32,
.mode_float_arithmetic = NULL, /* will be set later */
.type_long_long = NULL, /* will be set later */
.type_unsigned_long_long = NULL, /* will be set later */
.type_long_double = NULL, /* will be set later */
.stack_param_align = 4,
.float_int_overflow = ir_overflow_indefinite,
};
/**
......
......@@ -547,28 +547,28 @@ static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
static const backend_params *sparc_get_backend_params(void)
{
static const ir_settings_arch_dep_t arch_dep = {
1, /* also_use_subs */
1, /* maximum_shifts */
31, /* highest_shift_amount */
NULL, /* evaluate_cost_func */
1, /* allow mulhs */
1, /* allow mulhu */
32, /* max_bits_for_mulh */
.also_use_subs = true,
.maximum_shifts = 1,
.highest_shift_amount = 31,
.evaluate = NULL,
.allow_mulhs = true,
.allow_mulhu = true,
.max_bits_for_mulh = 32,
};
static backend_params p = {
true, /* big endian */
false, /* PIC code supported */
false, /* unaligned memory access */
32, /* modulo shift */
&arch_dep, /* will be set later */
sparc_is_mux_allowed, /* parameter for if conversion */
32, /* machine size */
NULL, /* float arithmetic mode */
NULL, /* long long type */
NULL, /* usigned long long type */
NULL, /* long double type */
4, /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
ir_overflow_min_max
.byte_order_big_endian = true,
.pic_supported = false,
.unaligned_memaccess_supported = false,
.modulo_shift = 32,
.dep_param = &arch_dep,
.allow_ifconv = sparc_is_mux_allowed,
.machine_size = 32,
.mode_float_arithmetic = NULL, /* will be set later */
.type_long_long = NULL, /* will be set later */
.type_unsigned_long_long = NULL, /* will be set later */
.type_long_double = NULL, /* will be set later */
.stack_param_align = 4,
.float_int_overflow = ir_overflow_min_max,
};
ir_mode *mode_long_long
......
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