This fixes opt/fehler070.c on ARM.

They just use a 12 bit offset, not an immediate shifter operand.
This fixes the regression in ack/str.c.

This is a bigger rewrite of stack frame handling in the backend:

- Do the stack frame type layout late, after all the spill slots have
  been created. This way we can avoid (and remove) the brittle
  frame_alloc_area().
- Standardize the meaning of stack entity offsets. After stack frame type
  layout they are relative to the stack pointer position at the beginning
  of the function.  It is all in one type now, no splitting into "arg",
  "between" and "stack_frame" type anymore.
- Generalize the stack pointer simulation code to work with a single
  callback. Represent stack state as current offset and align_padding
  number. Now that callbacks can access and modify them both we do not
  need custom code in the sparc backend anymore.
- Remove alignment specification on IncSP, only keep a ignore_align flag
  used for the last IncSP that has to remove all existing sp adjustments
  and may end up on a misaligned SP on ia32/amd64.
- Align stack by default on ia32+amd64 backends.

arm, be, ia32, sparc: Do not go on with peephole optimization of IncSP, when be_peephole_IncSP_IncSP() succeeded.

The current IncSP was removed in this case and we now would operate on its predecessor IncSP.
This is wrong, e.g. when asking for currently free registers.
This corrects backend/incsp_pop.c, which was broken on ia32.
It was wrongly assumed that a certain register was free and could be used to turn an IncSP into a Pop.

It has been empty for nearly all systems. People who used to put stuff
in config.h can still create a config.h on their own and inject
-include (gcc) or /FI (msvc) into their CPPFLAGS.

The pattern was common over all the transformers

Just state the copyright and the project the files belong to. You can
then find the COPYING file for the whole project.

The opcode list was a member of irprog before which wasn't really
handled consistently. Also make sure opcodes are properly freed at
ir_finish().

[r28038]

eliminate the unnecessary and especially confusing concept of a 'code_generator' an isa-interface is enough

[r28009]

[r27730]

[r27693]

[r27153]

  (with different arguments and register constraints for the same node now)
- Lots of cleanups/changes in the arm backend. We can represent all
  "shifter operands" now (but the code selection isn't optimal yet)
- More fixes all over the place - arm backend handles 164.gzip now

[r26673]

  disabled some broken transformers. (Queens, Quicksort and several other stuff from the
  testsuite work, but still lots of stuff broken)

[r26649]

[r26535]

- SymConst's are now ALWAYS placed in the start block

[r26236]

Generate new_bd_* instead of new_rd_* functions in the backend.  The nodes are always created on the current irg.

[r23535]

[r22754]

[r22699]

[r22697]

Replace be_peephole_before_exchange()+sched_remove()+exchange()+be_peephole_new_node() by the new function be_peephole_exchange().

[r20788]

[r20167]

- removed unused code

[r19824]

[r19823]