[r27987]

[r27979]

allow backend to specify endianess, rewrite bitfield emitter to handle little and big-endian byte order

[r27974]

[r27973]

[r27972]

[r27971]

[r27970]

[r27969]

[r27968]

[r27967]

[r27959]

[r27958]

[r27957]

[r27956]

[r27955]

a normalisation which shrinks values on the right shift operand because of modulo_shift behaviour. As a nice side-effect this simplifies the Rotl matcher

[r27954]

[r27953]

[r27952]

sparc: rewrite address mode matching, we now use offsets for load/store nodes and need less special nodes

[r27951]

[r27950]

[r27949]

[r27948]

use operands_are_normalized when permuting Not operations on Xor inputs to avoid commutative normalisation turning it back

[r27947]

[r27946]

[r27945]

[r27944]

backend is responsible for defining what lowering operations need to be performed => so the logical thing is to use a backend callback for performing lowerings

[r27938]

make if-conversion and archdep optimisations get their information directly from the backend without frontends needing special code to transfer these infos

[r27937]

[r27936]

[r27924]

[r27923]

[r27919]

[r27918]

[r27917]

[r27916]

[r27915]

[r27914]

[r27913]

sparc: No need for Minus, Not, Nop nodes. Implement with the real instructions Sub, XNor and zero register

[r27912]

[r27911]