Taking explicit size+po2align makes things easier compared to the
previously used ir_type: ir_type* is a middleend concept not everything
in the backend is represented as a type/mode anymore (x86_insn_size_t).
Furthermore we only respected size+alignment of that type anyway,
additional semantics would be unexpectedly ignored. It also simplifies
the code in some places.

This should also naturally fix a problem in 188.amp where we wrongly
passed the type for mode_Ls instead of the type for mode_D before.

- Always dump the actual name and not some apreviation/interpretation.
- Add the missing flags.
- Use a switch so we get a warning when flags are missing from the list.

Handling of shifts < 32bits was broken with the x8_insn_size_t change.

All users used X86_SIZE_32 anyway and there is little use in writing
half a register and without an input you cannot control the value of
the rest.

The node is usually less interesting for backend nodes, so it is enough
to have it in the detail attributes.

This is shorter than loading from a constant pool.
gcc does it, too.

base, index an mem are never null after calling build_address().

No caller uses this flag.

'match_upconv' might sign-extend, which is wrong for doing a popcount.

The operand is a pointer, so always has the right width.

This avoids some (mostly false) warnings about missing initializers.

Nearly all structs derived from amd64_attr_t has a size member anyway.
Simplify the code and move it to the base amd64_attr_t.

iropt: Implement 'computed_value_Proj_Builtin' for 'ir_bk_clz', 'ir_bk_ctz', 'ir_bk_ffs', 'ir_bk_parity' and 'ir_bk_popcount'.

Either the conv is used as the new result or it has further users.
In either case it is used afterwards and cannot be removed.

The mode of both nodes is the mode for the GP register class already.