1. 25 Apr, 2016 1 commit
    • Matthias Braun's avatar
      bespillslots: Change spillslot collection API to take size+align · 61c58871
      Matthias Braun authored
      Taking explicit size+po2align makes things easier compared to the
      previously used ir_type: ir_type* is a middleend concept not everything
      in the backend is represented as a type/mode anymore (x86_insn_size_t).
      Furthermore we only respected size+alignment of that type anyway,
      additional semantics would be unexpectedly ignored. It also simplifies
      the code in some places.
      
      This should also naturally fix a problem in 188.amp where we wrongly
      passed the type for mode_Ls instead of the type for mode_D before.
      61c58871
  2. 24 Apr, 2016 3 commits
  3. 05 Apr, 2016 1 commit
  4. 04 Apr, 2016 4 commits
    • Matthias Braun's avatar
      ia32, amd64: Share address mode emit code. · 3d2bbc65
      Matthias Braun authored
      This meant initializing the address mode variant all over the ia32
      backend, on the other hand this will be useful if we ever switch the
      ia32 backend to a style without NoReg nodes (like amd64).
      3d2bbc65
    • Matthias Braun's avatar
      ia32, amd64: Introduce common x86_addr_t struct. · d13cb0a6
      Matthias Braun authored
      We only use the immediate and scale yet on ia32.
      d13cb0a6
    • Matthias Braun's avatar
    • Matthias Braun's avatar
      be: Rewrite stack frame handling · b6787e36
      Matthias Braun authored
      This is a bigger rewrite of stack frame handling in the backend:
      
      - Do the stack frame type layout late, after all the spill slots have
        been created. This way we can avoid (and remove) the brittle
        frame_alloc_area().
      - Standardize the meaning of stack entity offsets. After stack frame type
        layout they are relative to the stack pointer position at the beginning
        of the function.  It is all in one type now, no splitting into "arg",
        "between" and "stack_frame" type anymore.
      - Generalize the stack pointer simulation code to work with a single
        callback. Represent stack state as current offset and align_padding
        number. Now that callbacks can access and modify them both we do not
        need custom code in the sparc backend anymore.
      - Remove alignment specification on IncSP, only keep a ignore_align flag
        used for the last IncSP that has to remove all existing sp adjustments
        and may end up on a misaligned SP on ia32/amd64.
      - Align stack by default on ia32+amd64 backends.
      b6787e36
  5. 01 Apr, 2016 1 commit
  6. 15 Mar, 2016 1 commit
  7. 10 Mar, 2016 1 commit
  8. 26 Feb, 2016 2 commits
  9. 15 Feb, 2016 2 commits
  10. 14 Feb, 2016 1 commit
  11. 08 Feb, 2016 1 commit
  12. 01 Feb, 2016 1 commit
  13. 31 Jan, 2016 2 commits
  14. 30 Jan, 2016 1 commit
  15. 26 Jan, 2016 1 commit
  16. 18 Jan, 2016 1 commit
  17. 10 Jan, 2016 1 commit
  18. 30 Dec, 2015 1 commit
  19. 16 Dec, 2015 1 commit
    • Matthias Braun's avatar
      ia32: Add keep edge to cached nodes · 92663003
      Matthias Braun authored
      If the cached nodes like NoReg_GP, ... had no keep edge and no users
      then irgwalks could miss them leading for the iredges code to miss
      initializing these nodes.
      
      This fixes bug 161.
      92663003
  20. 14 Dec, 2015 1 commit
  21. 03 Dec, 2015 1 commit
  22. 28 Sep, 2015 1 commit
  23. 20 Sep, 2015 6 commits
  24. 17 Sep, 2015 1 commit
  25. 15 Sep, 2015 1 commit
  26. 10 Sep, 2015 1 commit
  27. 30 Aug, 2015 1 commit