[r15707]

[r15703]

- typos fixed
- removed some Macros generating functions

[r15695]

[r15668]

[r15663]

don't create Inc/Dec in transform phase but delay that decision for the finish phase (of course we still create IncMem and DecMem nodes)

[r15659]

[r15648]

[r15645]

- Source and Destination address mode are now constructed during the normal
  transform phase and not as a separate phase
- Remove the old ImmOp stuff
- introduce 8, 16bit cmps, tests
- still some nodes miss SourceAM handling, but generally we should be as good/better than the old code, so I'm comitting now

[r15642]

[r15617]

- removed be_FrameLoad and be_FrameStore nodes which weren't used anymore
- removed be_StackParam and replace it with Load(be_FrameAddr) constructs

[r15610]

[r15609]

[r15592]

do Conv after Set command (instead of mov 0,) before the set, should be as fast as before but opens up other optimisation possibilities

[r15591]

[r15579]

[r15543]

[r15530]

[r15526]

[r15509]

[r15505]

[r15504]

[r15501]

- Support Syncs in spillslot coalescer

[r15499]

[r15462]

[r15445]

[r15431]

no need for Zex commands, we already had the Conv (which are superior as they can do AM and have some load optimisations)

[r15421]

[r15419]

[r15389]

[r15330]

[r15294]

[r15252]

[r15230]

[r15225]

Prevented Proj nodes which are successors of IA32 nodes of beeing converted to ProjIu, since those nodes are 128bit Vector Projs. Quick Hack.

[r15201]

[r15189]

[r15173]

[r15171]

[r15169]

[r15097]