Only keep the basics necessary to emit text lines in beemitter.[ch] and
move all the other convenience stuff to beemithlp.[ch].

We previously left the amd64_addr_t attribute uninitialized for OP_REG,
OP_REG_REG and OP_REG_IMM. Make the code more consistent by always
initializing it to the newly introduced X86_ADDR_REG variant, as a bonus
we can also use base_input member to indicate the register input instead
of hardcoding it to 0.

This function was deleted in 2007!

This allows us to properly implement the OS X calling conventions.

In case there also was a Shrs(x, 31),
CSE can be applied after instruction selection.

Otherwise the node directly produces the flags result.
This fixes backend/destam_flags4.c.

ia32: Simply make the fpcw caller (and callee) saved, so we do not need a special case when generating a call.

'mov $~0x80000000, %r; ror x, %r' is shorter than 'mov $0x80000000, %r; shr x, %r; not %r'.

'Or' cannot have float mode.

'mov $~1, %r; rol x, %r' is shorter than 'mov $1, %r; shl x, %r; not %r'.

At least __builtin_return_address(0) with -fomit-frame-pointer works
again (the variant with frame pointer is still broken).

'thunk' is the current and default style to get the ip.
'pop' is the old way using 'call base; base: pop %reg'.

Simply always set the registers of all outputs of the new Add.

The comment, stating that ia32_finish_irg_walker() starts more walks, is stale.
Therefore it is not necessary to first collect all nodes with a walker and then apply ia32_finish_irg_walker().