The builtin can be used to generate fast code for unsigned division by constant.

Code generation is supported for the IA32 and the SPARC backend.
Since our ARM backend currently has no Add with Carry instruction,
the builtin is currently not supported on Arm.
The same holds for the AMD64 backend, which does not support a division yet.

Just state the copyright and the project the files belong to. You can
then find the COPYING file for the whole project.

irgmod: Pass the new inputs to turn_into_tuple() instead of initialising them with Bad and setting them afterwards.

switch with double-word input leads to panic, but still better than
obscure verifier errors.

You can still attach NoMem if no memory input is present.
This makes it more consistent with the Call node and fixes failing
get_ASM_mem in case of no memory input.

This makes it consistent with other firm analyse functions. Also removes
the unnecessary return value.

graph_properties are things that a transformation may destroy but which
can be easily recalculated.

graph_constraints are set after lowering phases have been running and
forbid certain constructs that no (later) transformation is allowed to construct

First it is unclear what is a good way to deconstruct a program into extended
basic blocks, also none of our optimizations works on extended basic
blocks.

It was a member of ir_prog before but not correctly handled.

The opcode list was a member of irprog before which wasn't really
handled consistently. Also make sure opcodes are properly freed at
ir_finish().

This is the new way of handling switch-jumps. The node contains a table
which maps (ranges of) input values to proj numbers. Compared to a
Cond-node this results in a clean consecutive sequence of Proj numbers
(no searching for a free number for the default_pn anymore) and allows
factoring multiple cases jumping to the same block in a single Proj
(though we still need the optimisation in cfopt for that).

The main change here is splitting new_ir_mode into new_int_mode,
new_reference_mode and new_float_mode. You can now specify
mantissa+exponent size in new_float_mode. This also changes:

- x86 80bit-FP mode is NOT a ieee754 don't put "ieee754" into functions
  names that can also handle x86 80bit fps
- Move ieee_descriptor_t from tarval module into ir_mode struct
  (and rename to float_descriptor_t)
- Introduce mode_Q which represents binary128 from ieee754
- You can ask float modes for mantissa/exponent sizes now
- Fix endianess when emitting big float values in begnuas
- A bunch of long double fixes in ia32: the mode there has 10bytes
  (80bit) but the variables typically are 12 or 16 byte big
- This fixes some problems of sparc binary128 handling