This is simpler, removes some code duplication and makes the backends more robust against duplicate Projs of Start, which can happen if optimisations are disabled.

- Rename other_different field to must_be_different
- Remove arch_register_req_type_must_be_different, it's enough to see
  if the must_be_different field is not zero.

- Rename other_same field to should_be_same.
- Remove arch_register_req_type_other_same, it's enough to see if the
  should_be_same field is not zero.

We can easily identify the outputs producing a stack pointer by looking
if the stack pointer register is assigned. Unfortunately this also
needed a new mechanism to tell the verifier that some registers are not
in SSA form (all the time) which needs a few extra lines in each
backend.

Get the obstack from the given start node.

* This also resolves an out-of-bounds access when a '#' is encountered.
* This also corrects a wrong format specifier in a panic message in the x86 backend.

Now we get a nice abort instead of silently generating invalid code, when a sparc immediate constraint cannot be fulfilled.

This enables matching Address+Const.

'A' is for 5-bit immediates, but the code matches the behavior of 'i', i.e. any immediate.

mode_b cannot/must be present in these places, otherwise the verifier would have complained.

amd64, arm, sparc: Replace the dependency edge of the IncSP after the Call by a stack output of the call.

This removes the only uses of dependency edges.

They only produce a single result and having mode_T is unnecessary.
This could be improved, i.e. use both results.
But I just corrected the current usage.

Since the prologue is added late, there are no Save nodes during transformation.

This flag is plain redundant.

* No \n at end; panic() adds one
* No punctuation mark at end
* Lowercase first letter

All other structs holding a register class call it cls, too.