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This is a bigger rewrite of stack frame handling in the backend:

- Do the stack frame type layout late, after all the spill slots have
  been created. This way we can avoid (and remove) the brittle
  frame_alloc_area().
- Standardize the meaning of stack entity offsets. After stack frame type
  layout they are relative to the stack pointer position at the beginning
  of the function.  It is all in one type now, no splitting into "arg",
  "between" and "stack_frame" type anymore.
- Generalize the stack pointer simulation code to work with a single
  callback. Represent stack state as current offset and align_padding
  number. Now that callbacks can access and modify them both we do not
  need custom code in the sparc backend anymore.
- Remove alignment specification on IncSP, only keep a ignore_align flag
  used for the last IncSP that has to remove all existing sp adjustments
  and may end up on a misaligned SP on ia32/amd64.
- Align stack by default on ia32+amd64 backends.

They previously used be_stack_layout but that structure will be remove
soon.

This uses the newly introduced be_Relocation node to perform most PIC
transformations in ia32_pic.c. This introduces the elf and elf-no-plt
PIC modes. The "efl" mode does not work yet because the additional ebx
input makes calls register pressure unfaithful.

Only IA32_PIC_NONE and IA32_PIC_MACHO so far, but more will come.

Use the same style as the SPARC 64bit lowering, making the additional
handle_intrinsics step unnecessary now.

The code was only working on ia32 and contains several ia32 specific
bits, so keep it in the ia32 backend for now. At least the amd64 backend
will require a different implementation of PIC.

It has been empty for nearly all systems. People who used to put stuff
in config.h can still create a config.h on their own and inject
-include (gcc) or /FI (msvc) into their CPPFLAGS.

Just state the copyright and the project the files belong to. You can
then find the COPYING file for the whole project.

It's really the same stuff just before and after running ia32_x87
simulator, there is no real need to have 2 different things.

The main change here is splitting new_ir_mode into new_int_mode,
new_reference_mode and new_float_mode. You can now specify
mantissa+exponent size in new_float_mode. This also changes:

- x86 80bit-FP mode is NOT a ieee754 don't put "ieee754" into functions
  names that can also handle x86 80bit fps
- Move ieee_descriptor_t from tarval module into ir_mode struct
  (and rename to float_descriptor_t)
- Introduce mode_Q which represents binary128 from ieee754
- You can ask float modes for mantissa/exponent sizes now
- Fix endianess when emitting big float values in begnuas
- A bunch of long double fixes in ia32: the mode there has 10bytes
  (80bit) but the variables typically are 12 or 16 byte big
- This fixes some problems of sparc binary128 handling

This was an odd convention from the past, there's no need for it
anymore.