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This adds two builtin kinds, ir_bk_va_start and ir_bk_va_arg. va_arg Builtins
are lowered in the lower_builtins pass with a function provided by the backend,
whereby most architectures can use be_default_lower_va_args. va_start Builtins
are lowered in the backend.

Note: This commit breaks all backends except for IA32. SPARC and AMD64 are
implemented in later commits. The ARM backend previously miscompiled variadic
functions, and will now throw a proper error.

All backends have similar empty Start nodes, which just provide registers.
So having one generic backend Start node to share some infrastructure is sensible.

It pops a value from the stack, so this memory access should be represented in the graph.

Otherwise the frontend has to do this after asking the backend for its parameters, which is quite awkward.

It is like new_r_Proj(), but the mode is determined automatically from the out requirement of the predecessor.
This probably resolves some mode mismatches in untested code paths -- AMD64 backend and SPARC hard float, I'm looking at you!

We can easily identify the outputs producing a stack pointer by looking
if the stack pointer register is assigned. Unfortunately this also
needed a new mechanism to tell the verifier that some registers are not
in SSA form (all the time) which needs a few extra lines in each
backend.

The spiller crashes on some unoptimized Phi nodes.

Instead of having a generaic main loop in be_main with several callbacks
into the targets, split the code in be_main up into a set of convenience
functions and let the targets implement the main loop itself. This is
nicer because:

- The control flow into and out of the functions in the target becomes
  obvious as no external party is using callbacks anymore.
- Targets can insert custom code at any place between the generic
  passes.
- In the future we can parameterize the generic backend passes directly
  instead of stuffing info into generic isa_if structures.

This removes the last attributes from struct arch_env_t.

be: Move the info about the register classes and registers struct the arch_env_t into struct arch_isa_if_t.

Just use the selected isa interface directly.

be: Add the function arch_copy_irn_out_info() to copy one requirement and register from another node.

* This avoids allocating new requirements.
* This renders be_set_constr_single_reg_out() obsolete.

* Use rbp and rsp as output of leave, not rbp twice.
* Attach the rbp input/output of leave to rbp, not rsp.
* Use the function's own frame pointer instead of the caller's frame pointer.

These are remnants from back when the prologue was added early and scheduling was not done, yet.
They were there to help the scheduler not to move an IncSP before the copy from sp to bp and thus having two values in sp live at the same time.

amd64, ia32: Encode the length of the constraint list in the type instead of relying on matching magic numbers.

This first version should perform similar to the support in the ia32
backend, but needs more work to add amd64 specific immediate types.

This is the same correction as for ia32.
First construct all epilogues, then the prologue.
Check there, whether the IncSP has no users and add a keep edge in that case.

If the start node was deleted, something is very wrong.